SP301 Burr-Brown, SP301 Datasheet - Page 10

• Manufacturer Part Number: SP301
• Description: 12-Bit / 12MHz CCD/CIS SIGNAL PROCESSOR
• Manufacturer: Burr-Brown

THEORY OF OPERATION
The VSP3010 can be operated in one of the following four
modes:
3-CHANNEL CCD MODE
In this mode, the VSP3010 can simultaneously process three
output CCD signals. These signals are AC-coupled to the
RINP, GINP, and BINP inputs. RINN, GINN, BINN are not
used in this mode and should be grounded. The CLP signal
enables internal biasing circuitry to clamp these inputs to a
proper voltage, enabling internal CDS circuitry to operate
properly. VSP3010 inputs may be applied as DC-coupled
inputs, which need to be level-shifted to a proper DC level.
The correlated double samplers take two samples of the
incoming CCD signals; the CCD reference levels are taken
on the falling edge of CK1 and the CCD information is taken
on the falling edge of CK2. These two samples are then
subtracted by the CDSs and the result is the CDS’ output.
Three channels are used to process three inputs simulta-
neously. Each consists of a 5-bit PGA (0dB to +13dB)
and an 8-bit offset digital-to-analog converter (+50mV
to –150mV). A 3-to-1 analog MUX follows the CDS
channels and feeds a high performance 12-bit A/D con-
verter. The analog MUX can be programmed to cycle
between red, green, and blue or blue, green, and red.
When the STRT signal is HIGH, the conversion is initiated
on the rising edge of ADCCK. The STRT signal indicates
the first samples for a scan line. When STRT goes LOW, the
analog MUX is switched to the first sample of the sequence.
As specified in the “3-Channel CCD Mode” timing diagram,
the falling edge of CK2 must be in the LOW period of
ADCCK. If the falling edge of CK2 is in the HIGH period
of ADCCK (in the timing diagram, ADCCK for sampling B
channel), the VSP3010 will not function properly.
3-CHANNEL CIS MODE
In this mode, the VSP3010 is operated as 3-channel sam-
plers and a digitizer. Unlike the CCD mode, VSP3010 takes
only one sample on the falling edge of CK1 for each input.
Since only one sample is taken, CK2 is grounded in this
operation. The input signal is DC-coupled in most cases. For
example, for the red channel, RINP is the CIS signal input,
and RINN is the CIS reference signal. The same applies to
the green channel (GINP and GINN) and blue channel
(BINP and BINN).
In this mode, three CDSs become CIS signal processing
circuits (acting like a track-and-hold) to process three
inputs simultaneously. Each CIS signal processing circuit
consists of a 5-bit PGA (0dB to +13dB) and an 8-bit offset
3-Channel CCD Mode
3-Channel CIS Mode
1-Channel CCD Mode
1-Channel CIS Mode
®
VSP3010
10
DAC (+50mV to –150mV). A 3-to-1 analog MUX follows
the CIS signal processing circuits and feeds a high perfor-
mance 12-bit A/D converter. The analog MUX can be
programmed to cycle between red, green, and blue or blue,
green, and red.
When the STRT signal is HIGH, the conversion is initiated
on the rising edge of ADCCK. The STRT signal indicates
the first sample for a scan line. When STRT goes LOW, the
analog MUX is switched to the first sample of the sequence.
As specified in the “3-Channel CIS Mode” timing diagram,
the falling edge of CK1 must be in the LOW period of
ADCCK. If the falling edge of CK1 is in the HIGH period
of ADCCK (in the timing diagram, ADCCK for sampling B
channel), the VSP3010 will not function properly.
1-CHANNEL CCD MODE
In this mode, the VSP3010 processes only one CCD signal.
The CCD signal is AC-coupled to RINP, GINP, or BINP (as
selected by the data in the Configuration Register). RINN,
GINN, BINN are not used in this mode and should be
grounded. The CLP signal enables internal biasing circuitry
to clamp this input to a proper voltage so that internal CDS
circuitry can work properly. The VSP3010 input may be
applied as a DC-coupled input, which needs to be level-
shifted to a proper DC level.
The CDS takes two samples of the incoming CCD signal.
The CCD reference value is taken on the falling edge of
CK1 and the CCD information is taken on the falling edge
of CK2. These two samples are then subtracted by the CDS
and the result is the CDS’ output.
In this mode, only one of the three channels is enabled. Each
CDS consists of a 5-bit PGA (0dB to +13dB) and an 8-bit
offset DAC (+50mV to –150mV). A 3-to-1 analog MUX is
inserted between the CDSs and a high performance 12-bit
A/D converter. The analog MUX is not cycling between
channels in this mode. Instead, the analog MUX is con-
nected to a specific channel, depending on the data in the
Configuration Register.
As specified in the “1-Channel CCD Mode” timing diagram,
the rising edge of CK1 must be in the HIGH period of
ADCCK and the falling edge of the CK2 must be in the
LOW period of ADCCK. Otherwise, the VSP3010 will not
function properly.
1-CHANNEL CIS MODE
In this mode, the VSP3010 is operated as a 1-channel
sampler and digitizer. Unlike the CCD mode, VSP3010
takes only one sample on the falling edge of CK1. Since
only one sample is taken, CK2 is grounded in this operation.
The input signal is DC-coupled in most cases. Here, the
VSP3010 inputs are differential. For example, for the red
channel, RINP is the CIS signal input, and RINN is the CIS
reference signal. The same applies to the green channel
(GINP and GINN) and blue channel (BINP and BINN).