24LC21A-IP MicrochipTechnology, 24LC21A-IP Datasheet - Page 5

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24LC21A-IP

Manufacturer Part Number
24LC21A-IP
Description
1K2.5VDualModeI2CSerialEEPROM
Manufacturer
MicrochipTechnology
Datasheet
3.0
Before the 24LC21A can be switched into the Bi-direc-
tional Mode (Figure 3-1), it must enter the transition
mode, which is done by applying a valid high to low
transition on the Bi-directional Mode Clock (SCL). As
soon it enters the transition mode, it looks for a control
byte 1010 000X on the I
pulses on VCLK. Any high to low transition on the SCL
line will reset the count. If it sees a pulse count of 128
on VCLK while the SCL line is idle, it will revert back to
the Transmit-Only Mode, and transmit its contents start-
ing with the most significant bit in address 00h. How-
ever, if it detects the control byte on the I
(Figure 3-2) it will switch to the in the Bi-directional
Mode. Once the device has made the transition to the
Bi-directional mode, the only way to switch the device
back to the Transmit-Only Mode is to remove power
from the device. The mode transition process is shown
in detail in Figure 3-3.
FIGURE 3-1:
FIGURE 3-2:
1996 Microchip Technology Inc.
MODE
SCL
SDA
VCLK
MODE
VCLK
VCLK count =
BI-DIRECTIONAL MODE
VCLK count =
SDA
SCL
Transmit
Only Mode
Transmit
MODE TRANSITION WITH RECOVERY TO TRANSMIT-ONLY MODE
SUCCESSFUL MODE TRANSITION TO BI-DIRECTIONAL MODE
Only
2
C
1
bus, and starts to count
1
TVHZ
2
Transition Mode with possibility to return to Transmit-Only Mode
Bi-directional
2
n < 128
n
3
2
S
C
0
1
4
bus,
Preliminary
0
127 128
1
Once the device has switched into the Bi-directional
Mode, the VCLK input is disregarded, with the excep-
tion that a logic high level is required to enable write
capability. This mode supports a two-wire Bi-directional
data transmission protocol (I
device that sends data on the bus is defined to be the
transmitter, and a device that receives data from the
bus is defined to be the receiver. The bus must be con-
trolled by a master device that generates the Bi-direc-
tional Mode Clock (SCL), controls access to the bus
and generates the START and STOP conditions, while
the 24LC21A acts as the slave. Both master and slave
can operate as transmitter or receiver, but the master
device determines which mode is activated. In the Bi-
directional mode, the 24LC21A only responds to
commands for device 1010 000X.
0
(MSB of data in 00h)
Bit8
Recovery to Transmit-Only Mode
0
0
0
0
2
C ). In this protocol, a
24LC21A
ACK
DS21160B-page 5
Bi-directional
permanently

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