PXB4221 Infineon Technologies AG, PXB4221 Datasheet - Page 14
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PXB4221
Manufacturer Part Number
PXB4221
Description
IWE8 Interworking Element for 8 E1/T1 Lines
Manufacturer
Infineon Technologies AG
Datasheet
1.PXB4221.pdf
(290 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PXB4221EV3.2
Manufacturer:
INFIEON
Quantity:
20 000
- Current page: 14 of 290
- Download datasheet (5Mb)
List of Tables
Table 1
Table 2
Table 3
Table 4
Table 5
Table 6
Table 7
Table 8
Table 9
Table 10
Table 11
Table 12
Table 13
Table 14
Table 15
Table 16
Table 17
Table 18
Table 19
Table 20
Table 21
Table 22
Table 23
Table 24
Table 25
Table 26
Table 27
Table 28
Table 29
Table 30
Table 31
Table 32
Table 33
Table 34
Table 36
Table 38
Table 39
Table 40
Table 41
Data Sheet
58
66
115
Generic Framer Interface (73 pins) . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Definition of the CAS Signalling Conditioning Nibbles. . . . . . . . . . . . . 57
Cell Filling level values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Time slot Mapping in T1 Translation Mode 0 . . . . . . . . . . . . . . . . . . . . 96
F-Channel Format in T1 Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Configuration of the Microprocessor Interface Mode via PMT and TBUS .
Master Clock Frequency Depending on Mode. . . . . . . . . . . . . . . . . . 119
Statistics Counters for ATM Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
Statistics Counters for AAL Ports. . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
Relationship between Cell Filling and Segmentation Buffer Subblock Size
UTOPIA Interface (36 pins). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
IMA Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Clock Recovery Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Microprocessor Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
External RAM Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Test Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Miscellaneous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Not Connected Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Functions of IWE8 Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
ATM Cell Discarding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Activation sequence for ATM transmit ports . . . . . . . . . . . . . . . . . . . . 48
Activation sequence for ATM receive ports . . . . . . . . . . . . . . . . . . . . 54
Activation sequence for AAL segmentation channels . . . . . . . . . . . . . 59
Activation sequence for AAL reassembly channels . . . . . . . . . . . . . . 66
Relationship between Cell Filling and Reassembly Buffer Subblock Size
Coding of Slot Type in internal configuration RAMs . . . . . . . . . . . . . . 87
RAM slot positions for ITU-T G.804 compliant ATM mapping . . . . . . 87
AAL Idle slot positions for structured CES in AAL mode . . . . . . . . . . 89
AAL Idle slot positions for structured CES with CAS in AAL mode. . . 91
Clock Recovery Interface frame format . . . . . . . . . . . . . . . . . . . . . . 112
Internal Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 242
Clock and Reset Interface AC Timing Characteristics . . . . . . . . . . . 247
Framer Transmit Interface Timing in FAM . . . . . . . . . . . . . . . . . . . . 250
Framer Transmit Interface Timing in GIM . . . . . . . . . . . . . . . . . . . . . 252
Framer Interface AC Timing Characteristics in SYM2 Mode . . . . . . 254
Framer Interface Timing in SYM8 . . . . . . . . . . . . . . . . . . . . . . . . . . . 255
Framer Interface Timing in EC Mode . . . . . . . . . . . . . . . . . . . . . . . . 256
14
PXB4219 / PXB4220 / PXB4221
2002-05-06
Page
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