DS89C420 Dallas Semiconducotr, DS89C420 Datasheet - Page 27

• Manufacturer Part Number: DS89C420
• Description: Ultra-High-Speed Microcontroller
• Manufacturer: Dallas Semiconducotr

The second page mode (page mode 2) external bus structure multiplexes the most significant address byte
with data on P2, and uses P0 for the least significant address byte. This bus structure is used to speed up
external code fetches only. External data-memory access cycles are identical to the non-page mode except
for the different signals on P0 and P2. Figure 8 illustrates the memory cycle for external code fetches.
Figure 7. Page Mode 1, External Memory Cycle (CD1:CD0 = 10)
Internal Memory Cycles
RD / WR
XTAL1
RD / WR
RD / WR
PSEN
Port 0
Port 2
ALE
PSEN
Port 0
Port 2
PSEN
Port 0
Port 2
ALE
ALE
MSB
Page Miss
MSBAdd
LSB
Page Miss
Inst
MSBAdd
LSB
Inst
Page Hit
LSB Add
LSB
MOVX
External Memory Cycles
Page Miss
MOVX
LSB
MOVX executed
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MOVX
Page Hit
LSB Add
MSB
Data Access
Inst
MOVX executed
LSB Add
LSB
Data
MSBAdd
Inst
MSB
Page Miss
Data Access
MOVX executed
LSB
Inst
LSB Add
Data Access
MSB
Data
Data Access
LSB Add
LSB
next instruction
Data
MSBAdd
Page Miss
Data
MSB
PAGES=00
PAGES=01
PAGES=10