FM20L08_07 RAMTRON [Ramtron International Corporation], FM20L08_07 Datasheet - Page 2

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FM20L08_07

Manufacturer Part Number
FM20L08_07
Description
1Mbit Bytewide FRAM Memory - Industrial Temp.
Manufacturer
RAMTRON [Ramtron International Corporation]
Datasheet
Pin Description
Rev. 1.72
May 2007
Pin Name
A(16:0)
/CE
/WE
/OE
DQ(7:0)
/LVL
DNU
VDD
VSS
WE
A(16:0)
CE
OE
VDD
LVL
Output
Supply
Supply
Type
Input
Input
Input
Input
I/O
-
Address inputs: The 17 address lines select one of 131,072 bytes in the FRAM array. The
Data: 8-bit bi-directional data bus for accessing the FRAM array.
Pin Description
address value is latched on the falling edge of /CE. Addresses A(2:0) are used for page
mode read and write operations.
Chip Enable inputs: The device is selected and a new memory access begins when /CE is
low. The entire address is latched internally on the falling edge of chip enable.
Subsequent changes to the A(2:0) address inputs allow page mode operation.
Write Enable: A write cycle begins when /WE is asserted. The rising edge causes the
FM20L08 to write the data on the DQ bus to the FRAM array. The falling edge of /WE
latches a new column address for fast page mode write cycles.
Output Enable: When /OE is low, the FM20L08 drives the data bus when valid data is
available. Deasserting /OE high tri-states the DQ pins.
Low Voltage Lockout: When the voltage monitor detects that V
/LVL pin will be asserted low. While /LVL is low, the memory array cannot be accessed
which prevents a low voltage write from corrupting data. When V
operating limits, the /LVL signal will be pulled high.
Do Not Use: This pin should be left unconnected.
Supply Voltage: 3.3V
Ground
VDD Monitor
Control
Logic
A(2:0)
A(16:3)
Figure 1. Block Diagram
Protect
Write
16K x 8 block
16K x 8 block
16K x 8 block
16K x 8 block
I/O Latch & Bus Driver
Column Decoder
. . .
16K x 8 block
16K x 8 block
16K x 8 block
16K x 8 block
FM20L08 - Industrial Temp.
DD
DD
is within its normal
is below V
DQ(7:0)
Page 2 of 14
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