FM24C256_05 RAMTRON [Ramtron International Corporation], FM24C256_05 Datasheet
FM24C256_05
Related parts for FM24C256_05
FM24C256_05 Summary of contents
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FM24C256 256Kb FRAM Serial Memory Features 256Kbit Ferroelectric Nonvolatile RAM Organized as 32,768 x 8 bits 10 High Endurance 10 Billion (10 45 year Data Retention NoDelay™ Writes Advanced High-Reliability Ferroelectric Process Fast Two-wire Serial Interface MHz ...
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Counter ` SDA Serial to Parallel Converter SCL WP Control Logic A0-A2 Pin Description Pin Name Type Pin Description A0-A2 Input Address 2-0: These pins are used to select one devices of the same type on ...
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Overview The FM24C256 is a serial FRAM memory. The memory array is logically organized as 32,768 x 8 bit memory array and is accessed using an industry standard two-wire interface. Functional operation of the FRAM is similar to serial EEPROMs. ...
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Stop Start (Master) (Master) Stop Condition A Stop condition is indicated when the bus master drives SDA from low to high while the SCL signal is high. All operations using the FM24C256 must end with a Stop condition ...
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Addressing Overview After the FM24C256 (as receiver) acknowledges the device address, the master can place the memory address on the bus for a write operation. The address requires two bytes. The first is the MSB (upper byte). Since the device ...
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Start By Master S Slave Address 0 By FM24C256 Start By Master X S Slave Address FM24C256 Read Operation There are two types of read operations. They are current address read and selective address read ...
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Start By Master By FM24C256 Start Address By Master S Slave Address By FM24C256 Start Address By Master S Slave Address 0 A Address MSB By FM24C256 Endurance A FRAM internally operates with a read and restore mechanism. Therefore, endurance ...
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Electrical Specifications Absolute Maximum Ratings Symbol V Voltage Voltage on any signal pin with respect Storage Temperature STG T Lead temperature (Soldering, 10 seconds) LEAD V Electrostatic Discharge Voltage ESD - Human ...
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AC Parameters ( Symbol Parameter f SCL Clock Frequency SCL t Clock Low Period LOW t Clock High Period HIGH t SCL Low to SDA Data Out Valid AA t Bus ...
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Diagram Notes All start and stop timing parameters apply to both read and write cycles. Clock specifications are identical for read and write cycles. Write timing parameters apply to slave address, word address, and write data bits. Functional relationships are ...
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Mechanical Drawing 8-pin EIAJ SOIC Pin 1 5.23 0.10 ± 1.27 0.36 0.50 All dimensions in millimeters. EIAJ SOIC Package Marking Scheme Legend: XXXXXX= part number LLLLLLL= lot code RIC=Ramtron Int’l Corp, YY=year, WW=work week XXXXXXX-G LLLLLLL FM24C256, “Green” EIAJ ...
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Revision History Revision Date 1.0 4/10/01 1.1 9/28/01 1.2 1/31/02 1.3 2/3/04 3.0 2/16/05 3.1 5/5/05 Rev 3.1 May 2005 Summary Initial Release Changed Idd and Isb specifications. Changed test load to 1700 ohms to reflect 3mA V test condition. ...