ISPPAC30-01SI LATTICE [Lattice Semiconductor], ISPPAC30-01SI Datasheet - Page 17

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ISPPAC30-01SI

Manufacturer Part Number
ISPPAC30-01SI
Description
In-System Programmable Analog Circuit
Manufacturer
LATTICE [Lattice Semiconductor]
Datasheet
Lattice Semiconductor
A Ground-Based Current Sense Technique
Because the ispPAC30’s common-mode input range extends down to ground, this part is straightforward to use in
applications with ground-referenced signals. An example of such an application is the current sensor shown in Fig-
ure 4. A 0-10A current input develops a voltage ranging from 0-1V across the 0.1Ω sense resistor. This application
also illustrates one of the primary benefits of differential signal processing. Although one can sense the voltage at
the resistor’s input terminal with a single-ended amplifier, this assumes that the ground terminal of the resistor is
really at ground. At ampere-level currents, this is a big, and often unwarranted assumption which can result in sig-
nificant measurement errors. By sensing the actual voltage at both resistor terminals one can avoid this source of
measurement error.
Figure 4. ispPAC30 Sensing Differential Signals Near Ground
In this particular application, where high currents are being measured, there may be the possibility that the volt-
ages at the resistor terminals exceed those that the ispPAC30 can safely handle. If the input voltage becomes
lower than -0.6V or higher than +5.6V, input protection diodes inside the device will begin to turn on and shunt input
current to either ground or the positive power supply. In this case, since amperes of current are potentially avail-
able, significant damage to the ispPAC30 could result if this occurs. Resistors R2 and R3 protect against this possi-
bility, by limiting maximum input current to safe levels (milliamperes) that the device’s input protection networks can
readily handle.
Voltage Reference Output
The 2.5V voltage reference output of the ispPAC30 (VREF
be buffered when using it as an external reference to drive other circuitry. It also should always be decoupled using
the recommended capacitor specified in the pin description table of this data sheet. If it is used to reference a high
impedance source (e.g., one that does not require more than 40µA), the VREF
directly. An example is shifting the DC level of a signal connected to the input pin of an ispPAC30. Also, by using a
current limiting resistor with the VREF
ence. Check the ispPAC applications literature for numerous examples of these and other useful techniques for
using VREF
rest of the ispPAC30.
Output Amplifiers
The ispPAC30 has two output amplifiers, or OA’s. The single-ended outputs of these amplifiers swing from 0V to
+5V and are hard-wired internally to the output pins. In addition, the outputs are also routed and available for con-
nection as inputs to any of the input IA’s or MDAC’s. Each OA can be configured independently to function as either
a full-bandwidth amplifier, a low-pass filter, an integrator or a comparator. All these configuration choices are
accessed by the user via the PAC-Designer design entry software. They can also be reconfigured along, with any
other part of the ispPAC30, using JTAG or SPI serial interface control to directly communicate with the device.
In addition to the multiple functions possible with the OA’s, another unique feature is that any or all of the IA’s and
MDAC’s can be selectively routed to either of the OA summing nodes. This provides the maximum amount of flexi-
bility to the user over how the device is ultimately configured. IA’s can be connected in parallel to one OA or the
OUT
. Note: If the VREF
0-10A
I
IN
R
1
OUT
OUT
pin is overloaded or disturbed, it will adversely affect the operation of the
0.1Ω
20W
pin, it may also be used without buffering and still provide a DC refer-
10kΩ
10kΩ
R
R
2
3
17
OUT
100mV/A
) has a high impedance voltage output which should
ispPAC30 Preliminary Data Sheet
OUT
IA
output can be connected to it

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