WM8980CGEFL/RV WOLFSON [Wolfson Microelectronics plc], WM8980CGEFL/RV Datasheet - Page 84

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WM8980CGEFL/RV

Manufacturer Part Number
WM8980CGEFL/RV
Description
Stereo CODEC with Speaker Driver and Video Buffer
Manufacturer
WOLFSON [Wolfson Microelectronics plc]
Datasheet
WM8980
OUTPUT SWITCHING (JACK DETECT)
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When setup as an input, the CSB/GPIO1 pin can either be used as CSB or for jack detection,
depending on how the MODE pin is set.
If setup as an input, the GPIO4 pin can also be used for jack detection.
Table 63 illustrates the functionality of the GPIO1 and GPIO4 pins when used as general purpose
outputs.
Table 63 CSB/GPIO Control
Note: If MODE is set to 3 wire mode, CSB/GPIO1 shall be used as CSB input irrespective of the
GPIO1SEL[2:] bits.
Note that SLOWCLKEN must be enabled when using the Jack Detect function.
Note that SLOWCLKEN must be enabled when using the Jack Detect function.
For further details of the Jack detect operation see the OUTPUT SWITCHING section.
When the device is configured with a 2-wire interface the CSB/GPIO1 pin can be used as a switch
control input to automatically disable one set of outputs and enable another. The L2/GPIO2,
R2/GPIO3 and GPIO4 pins can also be used for this purpose. For example, when a headphone is
plugged into a jack socket then it may be desirable to disable the speaker (e.g. when one of the
GPIO pins is connected to a mechanical switch in the headphone socket to detect plug-in).
The GPIO pins have an internal de-bounce circuit when in this mode in order to prevent the output
enables from toggling multiple times due to input glitches. This de-bounce circuit is clocked from a
slow clock with period 2
R8
GPIO
Control
R9
GPIO
Control
REGISTER
ADDRESS
2:0
3
5:4
2:0
3
BIT
21
x MCLK.
GPIO1SEL
GPIO1POL
OPCLKDIV
GPIO4SEL
GPIO4POL
LABEL
000
0
00
000
0
DEFAULT
CSB/GPIO1 pin function select:
000= input (CSB/jack detection:
depending on MODE setting)
001= reserved
010=Temp ok
011=Amute active
100=PLL clk o/p
101=PLL lock
110=logic 0
111=logic 1
GPIO1 Polarity invert
0=Non inverted
1=Inverted
PLL Output clock division ratio
00=divide by 1
01=divide by 2
10=divide by 3
11=divide by 4
GPIO4 pin function select:
000= input jack detection
001= reserved
010=Temp ok
011=Amute active
100=PLL clk o/p
101=PLL lock
110=logic 1
111=logic 0
GPIO4 Polarity invert
0=Non inverted
1=Inverted
DESCRIPTION
PP, Rev 3.8, May 2012
Pre-Production
84

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