WM8980CGEFL/RV WOLFSON [Wolfson Microelectronics plc], WM8980CGEFL/RV Datasheet - Page 22

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WM8980CGEFL/RV

Manufacturer Part Number
WM8980CGEFL/RV
Description
Stereo CODEC with Speaker Driver and Video Buffer
Manufacturer
WOLFSON [Wolfson Microelectronics plc]
Datasheet
WM8980
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OUT3 and OUT4 can be configured to provide an additional stereo lineout from the output of the
DACs, the mixers or the input microphone boost stages. Alternatively OUT4 can be configured as a
mono mix of left and right DACs or mixers, or simply a buffered version of the chip midrail reference
voltage. OUT3 can also be configured as a buffered VMID output. This voltage may then be used as
a headphone ‘pseudo ground’ allowing removal of the large AC coupling capacitors often used in the
output path.
AUDIO INTERFACES
The WM8980 has a standard audio interface, to support the transmission of stereo data to and from
the chip. This interface is a 3 wire standard audio interface which supports a number of audio data
formats including I2S, DSP/PCM Mode (a burst mode in which LRC sync plus 2 data packed words
are transmitted), MSB-First, left justified and MSB-First, right justified, and can operate in master or
slave modes.
CONTROL INTERFACES
To allow full software control over all features, the WM8980 offers a choice of 2 or 3 wire control
interface. It is fully compatible and an ideal partner for a wide range of industry standard
microprocessors, controllers and DSPs.
Selection between the modes is via the MODE pin. In 2 wire mode the address of the device is fixed
as 0011010.
CLOCKING SCHEMES
WM8980 offers the normal audio DAC clocking scheme operation, where 256fs MCLK is provided to
the DAC and ADC.
A PLL is included which may be used to generate these clocks in the event that they are not available
from the system controller. This PLL uses an input clock, typically the 12MHz USB or ilink clock, to
generate high quality audio clocks. If this PLL is not required for generation of these clocks, it can be
reconfigured to generate alternative clocks which may then be output on the GPIO pins and used
elsewhere in the system.
VIDEO BUFFER
The WM8980 incorporates a current mode output video buffer with an input 3
(LPF) and clamp. The gain through this buffer can be programmed as 0dB or 6dB via the control
interface. The current mode output means that the signal swing seen at the output of the buffer will
be the same as that at the connection to the receiving equipment (e.g. a TV). Note that the input to
the receiver should be AC coupled and terminated to 75, as is standard, for best performance.
POWER CONTROL
The design of the WM8980 has given much attention to power consumption without compromising
performance. It operates at very low voltages, and includes the ability to power off any unused parts
of the circuitry under software control, and includes standby and power off modes.
OPERATION SCENARIOS
Flexibility in the design of the WM8980 allows for a wide range of operational scenarios, some of
which are proposed below:
Multimedia phone; High quality playback to a stereo headset, a mono ear speaker or a loudspeaker is
supported, allowing hi-fi playback to be mixed with voice and other analogue inputs while
simultaneously transmitting a differential output from the microphone amplifier. A 5-band EQ enables
hi-fi playback to be customised to suit the user’s preferences and the music style, while
programmable filtering allows fixed-frequency noise (e.g. 217Hz) to be reduced in the digital domain.
Video playback directly to TV is supported using the integrated video buffer.
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PP, Rev 3.8, May 2012
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