71M6403-IGTR TERIDIAN [Teridian Semiconductor Corporation], 71M6403-IGTR Datasheet - Page 20

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71M6403-IGTR

Manufacturer Part Number
71M6403-IGTR
Description
Electronic Trip Unit
Manufacturer
TERIDIAN [Teridian Semiconductor Corporation]
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
71M6403-IGTR/F
Manufacturer:
Maxim Integrated
Quantity:
10 000
Instruction Set
All instructions of the generic 8051 microcontroller are supported. A complete list of the instruction set and of the associated op-
codes is contained in the 64xx Software User’s Guide (SUG).
Page: 20 of 75
FLSHCRL
WDI
INTBITS
INT0…INT6
0xF8
0xB2
0xE8
Table 10: Special Function Registers
R/W
W
R/W
R
R/W
R/W
R
©
2006 TERIDIAN Semiconductor Corporation
Bit 0 (FLSH_PWE): Program Write Enable:
(default).
This bit is automatically reset after each byte is written to flash. Writes to
this bit are inhibited when interrupts are enabled.
Bit 1 (FLSH_MEEN): Mass Erase Enable:
Must be re-written for each new Mass Erase cycle.
Bit 6 (SECURE):
Enables security provisions that prevent external reading of flash
memory and CE program RAM. This bit is reset on chip reset and may
only be set. Attempts to write zero are ignored.
Bit 7 (PREBOOT):
Indicates that the preboot sequence is active.
Only byte operations on the whole WDI register should be used
when writing. The byte must have all bits set except the bits that are to
be cleared.
The multi-purpose register WDI contains the following bits:
Bit 0 (IE_XFER): XFER Interrupt Flag:
This flag monitors the XFER_BUSY interrupt. It is set by hardware and
must be cleared by the interrupt handler
Bit 1 (IE_ZP8): 0.8sec Interrupt Flag:
This flag monitors the ZP8 0.8sec interrupt. It is set by hardware and
must be cleared by the interrupt handler
Interrupt inputs. The MPU may read these bits to see the input to
external interrupts INT0, INT1, up to INT6. These bits do not have any
memory and are primarily intended for debug use. Refer to the External
Interrupts description.
0 – MOVX commands refer to XRAM Space, normal operation
1 – MOVX @DPTR,A moves A to Program Space (Flash) @ DPTR.
0 – Mass Erase disabled (default).
1 – Mass Erase enabled.
Electronic Trip Unit
71M6403
SEPTEMBER 2006
REV 1.0

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