SX18AA100-I/DP ETC [List of Unclassifed Manufacturers], SX18AA100-I/DP Datasheet - Page 9

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SX18AA100-I/DP

Manufacturer Part Number
SX18AA100-I/DP
Description
Configurable Communications Controllers with EE/Flash Program Memory, In-System Programming Capability and On-Chip Debug
Manufacturer
ETC [List of Unclassifed Manufacturers]
Datasheet
3.1.1 Read-Modify-Write Considerations
Caution must be exercised when performing two succes-
sive read-modify-write instructions (SETB or CLRB oper-
ations) on I/O port pin. Input data used for an instruction
must be valid during the time the instruction is executed,
and the output result from an instruction is valid only after
that instruction completes its operation. Unexpected
results from successive read-modify-write operations on
I/O pins can occur when the device is running at high
speeds. Although the device has an internal write-back
section to prevent such conditions, it is still recom-
mended that the user program include a NOP instruction
as a buffer between successive read-modify-write
instructions performed on I/O pins of the same port.
Also note that reading an I/O port is actually reading the
pins, not the output data latches. That is, if the pin output
driver is enabled and driven high while the pin is held low
externally, the port pin will read low.
3.2 Port Configuration
Each port pin offers the following configuration options:
• data direction
• input voltage levels (TTL or CMOS)
• pullup type (pullup resistor enable or disable)
• Schmitt trigger input (for Port B and Port C only)
Port B offers the additional option to use the port pins for
the Multi-Input Wakeup/Interrupt function and/or the ana-
log comparator function.
Port configuration is performed by writing to a set of con-
trol registers associated with the port. A special-purpose
instruction is used to write these control registers:
• mov !RA,W (move W to Port A control register)
• mov !RB,W (move W to Port B control register)
• mov !RC,W (move W to Port C control register)
Each one of these instructions writes a port control regis-
ter for Port A, Port B, or Port C. There are multiple control
registers for each port. To specify which one you want to
access, you use another register called the MODE regis-
ter.
3.2.1 MODE Register
The MODE register controls access to the port configura-
tion registers. Because the MODE register is not mem-
ory-mapped, it is accessed by the following special-
purpose instructions:
• mov M, #lit (move literal to MODE register)
• mov M,W (move W to MODE register)
• mov W,M (move MODE register to W)
The value contained in the MODE register determines
which port control register is accessed by the “mov !rx,W”
instruction as indicated in Table 3-3. MODE register val-
ues not listed in the table are reserved for future expan-
sion and should not be used. Therefore, the MODE
register should always contain a value from 08h to 0Fh.
Upon reset, the MODE register is initialized to 0Fh, which
enables access to the port direction registers.
© 2000 Scenix Semiconductor, Inc. All rights reserved.
- 9 -
After a value is written to the MODE register, that setting
remains in effect until it is changed by writing to the
MODE register again. For example, you can write the
value 0Eh to the MODE register just once, and then write
to each of the three pullup configuration registers using
the three “mov !rx,W” instructions.
The following code example shows how to program the
pullup control registers.
First the MODE register is loaded with 0Eh to select
access to the pullup control registers (PLP_A, PLP_B,
and PLP_C). Then the MOV !rx,W instructions are used
to specify which port pins are to be connected to the
internal pullup resistors. Setting a bit to 1 disconnects the
corresponding pullup resistor, and clearing a bit to 0 con-
nects the corresponding pullup resistor.
3.2.2 Port Configuration Registers
The port configuration registers that you control with the
MOV !rx,W instruction operate as described below.
RA, RB, and RC Data Direction Registers (MODE=0Fh)
Each register bit sets the data direction for one port pin.
Set the bit to 1 to make the pin operate as a high-imped-
ance input. Clear the bit to 0 to make the pin operate as
an output.
SX18AC/SX20AC/SX28AC/SX18AC75/SX20AC75/SX28AC75
MODE Reg. mov !RA,W
mov
mov
mov
mov
mov
mov
mov
0Ah
0Bh
0Ch
0Dh
0Eh
08h
09h
0Fh
M,#$0E
W,#$03
!RA,W
W,#$FF
!RB,W
W,#$00
!RC,W
Table 3-3. MODE Register and Port
Control Register Access
RA Direction
not used
not used
not used
not used
not used
PLP_A
LVL_A
;MODE=0Eh to access port pullup
;registers
;W = 0000 0011
;disable pullups for A0 and A1
;W = 1111 1111
;disable all pullups for B0-B7
;W = 0000 0000
;enable all pullups for C0-C7
mov !RB,W
RB Direction
WKPND_B
WKED_B
WKEN_B
CMP_B
PLP_B
LVL_B
ST_B
www.scenix.com
mov !RC,W
RC Direction
not used
not used
not used
not used
PLP_C
LVL_C
ST_C

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