TMS470R1B512 AD [Analog Devices], TMS470R1B512 Datasheet - Page 13

• Manufacturer Part Number: TMS470R1B512
• Description: 16/32-Bit RISC Flash Microcontroller
• Manufacturer: AD [Analog Devices]

Memory Selects
Memory selects allow the user to address memory arrays (i.e., flash, RAM, and HET RAM) at user-defined
addresses. Each memory select has its own set (low and high) of memory base address registers (MFBAHRx
and MFBALRx) that, together, define the array's starting (base) address, block size, and protection.
The base address of each memory select is configurable to any memory address boundary that is a multiple of
the decoded block size. For more information on how to control and configure these memory select registers,
see the bus structure and memory sections of the TMS470R1x System Module Reference Guide (literature
number SPNU189).
For the memory selection assignments and the memory selected, see
(1) The starting addresses for both RAM memory-select signals cannot be offset from each other by a multiple of the user-defined block
RAM
The B512 device contains 32K bytes of internal static RAM configurable by the SYS module to be addressed
within the range of 0x0000_0000 to 0xFFE0_0000. This B512 RAM is implemented in one 32K array selected by
two memory-select signals. This B512 configuration imposes an additional constraint on the memory map for
RAM; the starting addresses for both RAM memory selects cannot be offset from each other by the multiples of
the size of the physical RAM (i.e., 32K for the B512 device). The B512 RAM is addressed through memory
selects 2 and 3.
The RAM can be protected by the memory protection unit (MPU) portion of the SYS module, allowing the user
finer blocks of memory protection than is allowed by the memory selects. The MPU is ideal for protecting an
operating system while allowing access to the current task. For more detailed information on the MPU portion of
the SYS module and memory protection, see the memory section of the TMS470R1x System Module Reference
Guide (literature number SPNU189).
F05 Flash
The F05 flash memory is a nonvolatile electrically erasable and programmable memory implemented with a
32-bit-wide data bus interface. The F05 flash has an external state machine for program and erase functions.
See the flash read and flash program and erase sections below. For more detailed functional information on the
F05 flash module, see the TMS470R1x F05 Flash Reference Guide (literature number SPNU213).
Flash Protection Keys
The
program/erase/compaction operations from occurring until after the four protection keys have been matched by
the CPU loading the correct user keys into the FMPKEY control register. The protection keys on the B512 are
located in the last 4 words of the first 16K sector. For more detailed information on the flash protection keys and
the FMPKEY control register, see the "Optional Quadruple Protection Keys" and "Programming the Protection
Keys" portions of the TMS470R1x F05 Flash Reference Guide (literature number SPNU213).
MEMORY
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size in the memory-base address register.
SELECT
0 (fine)
1 (fine)
2 (fine)
3 (fine)
4 (fine)
B512
device
MEMORY SELECTED
(ALL INTERNAL)
provides
HET RAM
FLASH
FLASH
RAM
RAM
flash
Table 3. Memory Selection Assignment
MEMORY
protection
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32K
SIZE
512K
1.5K
(1)
keys.
MPU
YES
YES
NO
NO
These
16/32-Bit RISC Flash Microcontroller
MEMORY BASE ADDRESS
MFBAHR0 and MFBALR0
MFBAHR1 and MFBALR1
MFBAHR2 and MFBALR2
MFBAHR3 and MFBALR3
MFBAHR4 and MFBALR4
SPNS107A – SEPTEMBER 2005 – REVISED AUGUST 2006
Table
four
REGISTER
3.
32-bit
protection
TMS470R1B512
keys
CTL REGISTER
STATIC MEM
SMCR1
prevent
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