LM3S1911-IQC20-A0 ETC2 [List of Unclassifed Manufacturers], LM3S1911-IQC20-A0 Datasheet - Page 4

• Manufacturer Part Number: LM3S1911-IQC20-A0
• Description: Microcontroller
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

Table of Contents
6.1.3
6.1.4
6.1.5
6.2
6.3
6.4
7
7.1
7.2
7.2.1
7.2.2
7.2.3
7.2.4
7.2.5
7.2.6
7.2.7
7.3
7.3.1
7.3.2
7.3.3
7.3.4
7.3.5
7.4
7.5
8
8.1
8.2
8.2.1
8.2.2
8.3
8.3.1
8.3.2
8.4
8.5
8.6
9
9.1
9.1.1
9.1.2
9.1.3
9.1.4
9.1.5
9.1.6
9.2
9.3
9.4
4
Power Control ........................................................................................................................... 56
Clock Control ............................................................................................................................ 56
System Control ......................................................................................................................... 58
Initialization and Configuration ................................................................................................... 59
Register Map ............................................................................................................................ 59
Register Descriptions ................................................................................................................ 60
Hibernation Module .......................................................................................................... 110
Block Diagram ........................................................................................................................ 111
Functional Description ............................................................................................................. 111
Register Access Timing ........................................................................................................... 111
Clock Source .......................................................................................................................... 112
Battery Management ............................................................................................................... 112
Real-Time Clock ...................................................................................................................... 112
Non-Volatile Memory ............................................................................................................... 113
Power Control ......................................................................................................................... 113
Interrupts and Status ............................................................................................................... 113
Initialization and Configuration ................................................................................................. 114
Initialization ............................................................................................................................. 114
RTC Match Functionality (No Hibernation) ................................................................................ 114
RTC Match/Wake-Up from Hibernation ..................................................................................... 114
External Wake-Up from Hibernation .......................................................................................... 115
RTC/External Wake-Up from Hibernation .................................................................................. 115
Register Map .......................................................................................................................... 115
Register Descriptions .............................................................................................................. 116
Internal Memory ............................................................................................................... 129
Block Diagram ........................................................................................................................ 129
Functional Description ............................................................................................................. 129
SRAM Memory ........................................................................................................................ 129
Flash Memory ......................................................................................................................... 130
Flash Memory Initialization and Configuration ........................................................................... 131
Flash Programming ................................................................................................................. 131
Nonvolatile Register Programming ........................................................................................... 132
Register Map .......................................................................................................................... 132
Flash Register Descriptions (Flash Control Offset) ..................................................................... 133
Flash Register Descriptions (System Control Offset) .................................................................. 140
General-Purpose Input/Outputs (GPIOs) ....................................................................... 153
Functional Description ............................................................................................................. 153
Data Control ........................................................................................................................... 153
Interrupt Control ...................................................................................................................... 154
Mode Control .......................................................................................................................... 155
Commit Control ....................................................................................................................... 155
Pad Control ............................................................................................................................. 155
Identification ........................................................................................................................... 155
Initialization and Configuration ................................................................................................. 155
Register Map .......................................................................................................................... 157
Register Descriptions .............................................................................................................. 158
Preliminary
October 09, 2007