LM3S1911-IQC20-A0 ETC2 [List of Unclassifed Manufacturers], LM3S1911-IQC20-A0 Datasheet - Page 378

• Manufacturer Part Number: LM3S1911-IQC20-A0
• Description: Microcontroller
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

Signal Tables
17
378
Signal Tables
The following tables list the signals available for each pin. Functionality is enabled by software with
the GPIOAFSEL register.
Important:
Table 17-1 on page 378 shows the pin-to-signal-name mapping, including functional characteristics
of the signals. Table 17-2 on page 382 lists the signals in alphabetical order by signal name.
Table 17-3 on page 386 groups the signals by functionality, except for GPIOs. Table 17-4 on page
390 lists the GPIO pins and their alternate functionality.
Table 17-1. Signals by Pin Number
Pin Number
10
11
12
13
14
1
2
3
4
5
6
7
8
9
All multiplexed pins are GPIOs by default, with the exception of the five JTAG pins (PB7
and PC[3:0]) which default to the JTAG functionality.
Pin Name
VDD25
VDDA
GNDA
U1Rx
U1Tx
PE7
PE6
C1o
PE5
PE4
LDO
VDD
GND
PD0
PD1
PD2
PD3
Preliminary
Pin Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
-
-
-
-
-
-
I
Buffer Type
Power
Power
Power
Power
Power
Power
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
Description
GPIO port E bit 7
GPIO port E bit 6
Analog comparator 1 output
The positive supply (3.3 V) for the analog
circuits (ADC, Analog Comparators, etc.).
These are separated from VDD to minimize
the electrical noise contained on VDD from
affecting the analog functions.
The ground reference for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from GND to minimize the electrical
noise contained on VDD from affecting the
analog functions.
GPIO port E bit 5
GPIO port E bit 4
Low drop-out regulator output voltage. This
pin requires an external capacitor between
the pin and GND of 1 µF or greater. When the
on-chip LDO is used to provide power to the
logic, the LDO pin must also be connected to
the VDD25 pins at the board level in addition
to the decoupling capacitor(s).
Positive supply for I/O and some logic.
Ground reference for logic and I/O pins.
GPIO port D bit 0
GPIO port D bit 1
GPIO port D bit 2
UART module 1 receive. When in IrDA mode,
this signal has IrDA modulation.
GPIO port D bit 3
UART module 1 transmit. When in IrDA mode,
this signal has IrDA modulation.
Positive supply for most of the logic function,
including the processor core and most
peripherals.
October 09, 2007