M30621ECGP MITSUBISHI [Mitsubishi Electric Semiconductor], M30621ECGP Datasheet - Page 24
M30621ECGP
Manufacturer Part Number
M30621ECGP
Description
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Manufacturer
MITSUBISHI [Mitsubishi Electric Semiconductor]
Datasheet
1.M30621ECGP.pdf
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Software wait
24
Software wait
Table 1.8.1. Software waits and bus cycles
A software wait can be inserted by setting the wait bit (bit 7) of the processor mode register 1 (address
0005
A software wait is inserted in the internal ROM/RAM area by setting the wait bit of the processor mode
register 1. When set to “0”, each bus cycle is executed in one BCLK cycle. When set to “1”, each bus cycle
is executed in two BCLK cycles. After the microcomputer has been reset, this bit defaults to “0”. Set this bit
after referring to the recommended operating conditions (main clock input oscillation frequency) of the
electric characteristics.
The SFR area is always accessed in two BCLK cycles regardless of the setting of these control bits.
Table 1.8.1 shows the software wait and bus cycles. Figure 1.8.3 shows example bus timing when using
software waits.
ROM/RAM
Note: Before attempting to change the contents of the processor mode register 1, set bit 1 of the protect
Internal
Area
SFR
16
) (Note).
register (address 000A
Wait bit
Invalid
0
1
2 BCLK cycles
1 BCLK cycle
2 BCLK cycles
16
) to “1”.
Bus cycle
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
M16C / 62 Group (80-pin)
Mitsubishi microcomputers
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