M30621ECGP MITSUBISHI [Mitsubishi Electric Semiconductor], M30621ECGP Datasheet - Page 196

• Manufacturer Part Number: M30621ECGP
• Description: SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
• Manufacturer: MITSUBISHI [Mitsubishi Electric Semiconductor]

CPU Rewrite Mode
196
Figure 1.22.1. Flash memory control registers
Bit 3 of the flash memory control register 1 turns power supply to the internal flash memory on/off. When
this bit is set to “1”, power is not supplied to the internal flash memory, thus power consumption can be
reduced. However, in this state, the internal flash memory cannot be accessed. To set this bit to “1”, it is
necessary to write “0” and then write “1” in succession. Use this bit mainly in the low speed mode (when
X
When the CPU is shifted to the stop or wait modes, power to the internal flash memory is automatically shut
off. It is reconnected automatically when CPU operation is restored. Therefore, it is not particularly neces-
sary to set flash memory control register 1.
Figure 1.22.2 shows a flowchart for setting/releasing the CPU rewrite mode. Figure 1.22.3 shows a flow-
chart for shifting to the low speed mode. Always perform operation as indicated in these flowcharts.
CIN
is the block count source of BCLK).
Flash memory control register 1
b7 b6 b5 b4 b3 b2 b1 b0
0
Flash memory control register 0
b7 b6 b5 b4 b3 b2 b1 b0
0
0
0
0
0
0
0
Note 1: For this bit to be set to “1”, the user needs to write a “0” and then a “1” to
Note 2: For this bit to be set to “1”, the user needs to write a “0” and then a “1” to
Note 3: Effective only when the CPU rewrite mode select bit = 1. Set this bit to 0
Note 4: Use the control program except in the internal flash memory for write to
Note : For this bit to be set to “1”, the user needs to write a “0” and then a “1” to
Bit symbol
Reserved bit
Reserved bit
FMR13
Reserved bit
Bit symbol
FMR00
FMR01
FMR02
FMR03
FMR05
Nothing is assigned.
When write, set "0". When read, values are indeterminate.
it in succession. When it is not this procedure, it is not enacted in “1”.
This is necessary to ensure that no interrupt or DMA transfer will be
executed during the interval. Use the control program except in the
internal flash memory for write to this bit.
it in succession when the CPU rewrite mode select bit = “1”. When it is
not this procedure, it is not enacted in “1”. This is necessary to ensure
that no interrupt or DMA transfer will be executed during the interval.
subsequently after setting it to 1 (reset).
this bit.
Symbol
it in succession. When it is not this procedure, it is not enacted in “1”.
This is necessary to ensure that no interrupt or DMA transfer will be
executed during the interval. Use the control program except in the
internal flash memory for write to this bit.
During parallel I/O mode,programming,erase or read of flash memory is
not controlled by this bit,only by external pins.
Symbol
FMR1
FMR0
Flash memory power
supply-OFF bit(Note)
RY/BY status flag
CPU rewrite mode
select bit (Note 1)
Lock bit disable bit
(Note 2)
User ROM area select bit
(Note 4) (Effective in only
boot mode)
Flash memory reset bit
(Note 3)
Bit name
Bit name
Address
Address
03B6
03B7
16
16
Must always be set to “0”
Must always be set to “0”
0: Flash memory power supply is
1: Flash memory power supply-off
Must always be set to “0”
0: Busy (being written or erased)
1: Ready
0: Normal mode
1: CPU rewrite mode
0: Block lock by lock bit data is
1: Block lock by lock bit data is
0: Normal operation
1: Reset
0: Boot ROM area is accessed
1: User ROM area is accessed
When reset
XXXXX0XX
(Software commands invalid)
(Software commands acceptable)
When reset
connected
enabled
disabled
XX000001
2
2
Function
Function
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
M16C / 62 Group (80-pin)
R
R W
R
R W
W
W
Mitsubishi microcomputers