M30621ECGP MITSUBISHI [Mitsubishi Electric Semiconductor], M30621ECGP Datasheet - Page 114

• Manufacturer Part Number: M30621ECGP
• Description: SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
• Manufacturer: MITSUBISHI [Mitsubishi Electric Semiconductor]

UART2 Special Mode Register
114
Table 1.14.8. Features in I
Figure 1.14.26. UART2 special mode register
10
11
UART2 Special Mode Register
1
2
3
4
5
6
7
8
9
The UART2 special mode register (address 0377
Figure 1.14.26 shows the UART2 special mode register.
Note 1: Make the settings given below when I
Note 2: Follow the steps given below to switch from a factor to another.
Note 3: Set an initial value of SDA transmission output when serial I/O is invalid.
Factor of interrupt number 10 (Note 2)
Factor of interrupt number 15 (Note 2)
Factor of interrupt number 16 (Note 2)
UART2 transmission output delay
P7
P7
P7
DMA1 factor at the time when 1 1 0 1 is assigned
to the DMA request factor selection bits
Noise filter width
Reading P7
Initial value of UART2 output
2
0
1
at the time when UART2 is in use
at the time when UART2 is in use
at the time when UART2 is in use
UART2 special mode register
b7 b6 b5 b4 b3 b2 b1 b0
0
1. Disable the interrupt of the corresponding number.
2. Switch from a factor to another.
3. Reset the interrupt request flag of the corresponding number.
4. Set an interrupt level of the corresponding number.
Set 0 1 0 in bits 2, 1, 0 of the UART2 transmission/reception mode register.
Disable the RTS/CTS function. Choose the MSB First function.
1
Function
Note 1: Nothing but “0” may be written.
Note 2: UART2 clock synchronous serial I/O mode cannot be used in M16C/62 (80-pin version) group.
Reserved bit
IICM
ABC
ABSCS
ACSE
BBS
LSYN
2
symbol
SSS
C mode
Bit
Symbol
U2SMR
I C mode selection bit
Transmit start condition
select bit
Arbitration lost detecting
flag control bit
Bus busy flag
Bus collision detect
sampling clock select bit
Auto clear function
select bit of transmit
enable bit
SCLL sync output
enable bit
2
2
C mode is in use.
Bit name
Bus collision detection
UART2 transmission
UART2 reception
Not delayed
TxD
RxD
CLK
UART2 reception
15ns
Reading the terminal when 0 is
assigned to the direction register
H level (when 0 is assigned to
the CLK polarity select bit)
2
2
2
(output)
(input)
Address
0377
Normal mode
16
16
0 : Normal mode
1 : I C mode
) is used to control UART2 in various ways.
(During clock synchronous
0 : Update per bit
1 : Update per byte
0 : STOP condition detected
1 : START condition detected
0 : Disabled
1 : Enabled
Must always be “0”
Must always be “0”
Must always be “0”
Always set to “0”
2
serial I/O mode)
When reset
Function
00
16
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Start condition detection or stop
condition detection
SDA (input/output) (Note 3)
Acknowledgment detection (ACK)
50ns
Reading the terminal regardless of the
value of the direction register
The value set in latch P7
selected
No acknowledgment detection (NACK)
Acknowledgment detection (ACK)
Delayed
SCL (input/output)
P7
0 : Ordinary
1 : Falling edge of RxD2
0 : Rising edge of transfer
1 : Underflow signal of timer A0
0 : No auto clear function
1 : Auto clear at occurrence of
Must always be “0”
Must always be “0”
Must always be “0”
Must always be “0”
2
clock
bus collision
(During UART mode)
M16C / 62 Group (80-pin)
Function
I
2
C mode (Note 1)
Mitsubishi microcomputers
0
when the port is
(Note1)
R
W