M30621ECGP MITSUBISHI [Mitsubishi Electric Semiconductor], M30621ECGP Datasheet - Page 197
M30621ECGP
Manufacturer Part Number
M30621ECGP
Description
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Manufacturer
MITSUBISHI [Mitsubishi Electric Semiconductor]
Datasheet
1.M30621ECGP.pdf
(230 pages)
- Current page: 197 of 230
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CPU Rewrite Mode
Figure 1.22.2. CPU Rewrite Mode Set/Reset Flowchart
Figure 1.22.3. Shifting to The Low Speed Mode Flowchart
Note 1: During CPU rewrite mode, set the main clock frequency as shown below using the main clock divide ratio
Note 2: For CPU rewrite mode select bit to be set to “1”, the user needs to write a “0” and then a “1” to it in
Note 3: Before exiting the CPU rewrite mode after completing erase or program operation, always be sure to
Note 4: “1” can be set. However, when this bit is “1”, user ROM area is accessed.
(Subsequent operations are executed by control
Note 1: For flash memory power supply-OFF bit to be set to “1”, the user needs to write a “0” and then a “1” to it in
Note 2: Before the count source for BCLK can be changed from X
(Subsequent operations are executed by control
Jump to transferred control program in RAM
Transfer the program to be executed in the
Jump to transferred control program in RAM
low speed mode, to the internal RAM.
Set processor mode register (Note 1)
select bit (bit 6 at address 0006
6.25 MHz or less when wait bit (bit 7 at address 0005
12.5 MHz or less when wait bit (bit 7 at address 0005
succession. When it is not this procedure, it is not enacted in “1”. This is necessary to ensure that no
interrupt or DMA transfer will be executed during the interval.
execute a read array command or reset the flash memory.
Transfer CPU rewrite mode control
Single-chip mode, or boot mode
succession. When it is not this procedure, it is not enacted in “1”. This is necessary to ensure that no
interrupt or DMA transfer will be executed during the interval.
the count source is going to be switched must be oscillating stably.
program to internal RAM
program in this RAM)
Program in ROM
program in this RAM)
Program in ROM
Start
*1
Start
*1
16
and bits 6 and 7 at address 0007
16
16
Execute read array command or reset flash
memory by setting flash memory reset bit (by
writing “1” and then “0” in succession) (Note 3)
Set flash memory power supply-OFF bit to “1”
(by writing “0” and then “1” in succession)(Note 1)
X
) = “0” (without internal access wait state)
) = “1” (with internal access wait state)
Set CPU rewrite mode select bit to “1” (by
writing “0” and then “1” in succession)(Note 2)
(Boot mode only)
Write “0” to user ROM area select bit (Note 4)
IN
Set flash memory power supply-OFF bit to “0”
Wait time until the internal circuit stabilizes
(Set NOP instruction about twice)
Using software command execute erase,
program, or other operation
(Set lock bit disable bit as required)
Write “0” to CPU rewrite mode select bit
Switch the count source of BCLK.
X
IN
Switch the count source of BCLK (Note 2)
oscillating
IN
(Boot mode only)
Set user ROM area select bit to “1”
to X
stop. (Note 2)
CIN
16
Process of low speed mode
Program in RAM
or vice versa, the clock to which
Program in RAM
):
Wait until the X
End
End
*1
*1
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
IN
has stabilized
M16C / 62 Group (80-pin)
Mitsubishi microcomputers
197
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