MC9S12DJ256 MOTOROLA [Motorola, Inc], MC9S12DJ256 Datasheet - Page 85
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MC9S12DJ256
Manufacturer Part Number
MC9S12DJ256
Description
MC9S12DT256 Device User Guide V03.03
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC9S12DJ256.pdf
(130 pages)
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The PCB must be carefully laid out to ensure proper operation of the voltage regulator as well as of the
MCU itself. The following rules must be observed:
•
•
•
•
•
•
•
Every supply pair must be decoupled by a ceramic capacitor connected as near as possible to the
corresponding pins (C1 – C6).
Central point of the ground star should be the VSSR pin.
Use low ohmic low inductance connections between VSS1, VSS2 and VSSR.
VSSPLL must be directly connected to VSSR.
Keep traces of VSSPLL, EXTAL and XTAL as short as possible and occupied board area for C7,
C8, C11 and Q1 as small as possible.
Do not place other signals or supplies underneath area occupied by C7, C8, C10 and Q1 and the
connection area to the MCU.
Central power input should be fed in at the VDDA/VSSA pins.
Component
C11 / C
C10 / C
C9 / C
R2 / R
R3 / R
R1 / R
Q1
C1
C2
C3
C4
C5
C6
C7
C8
DC
S
B
S
P
VDDPLL filter cap
PLL loop filter cap
PLL loop filter cap
PLL loop filter res
VDDR filter cap
VDDA filter cap
VDDX filter cap
VDD1 filter cap
VDD2 filter cap
OSC load cap
OSC load cap
DC cutoff cap
Purpose
Quartz
Colpitts mode only, if recommended by
X7R/tantalum
X7R/tantalum
ceramic X7R
ceramic X7R
ceramic X7R
ceramic X7R
See PLL Specification chapter
See PLL specification chapter
Type
MC9S12DT256 Device User Guide — V03.03
quartz manufacturer
Pierce mode only
100 .. 220nF
100 .. 220nF
>=100nF
>=100nF
100nF
100nF
Value
83