MC9S12DJ256 MOTOROLA [Motorola, Inc], MC9S12DJ256 Datasheet - Page 56
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MC9S12DJ256
Manufacturer Part Number
MC9S12DJ256
Description
MC9S12DT256 Device User Guide V03.03
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC9S12DJ256.pdf
(130 pages)
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Pin Name
PAD[14:8]
Funct. 1
VREGEN
PAD[6:0]
PAD[15]
RESET
PB[7:0]
PA[7:0]
EXTAL
PAD[7]
BKGD
TEST
XTAL
XFC
PE7
PE6
PE5
PE4
PE3
PE2
PE1
PE0
PH7
PH6
PH5
MC9S12DT256 Device User Guide — V03.03
54
ADDR[15:8]/
Pin Name
ADDR[7:0]/
DATA[15:8]
DATA[7:0]
Funct. 2
AN1[6:0]
AN0[6:0]
NOACC
AN1[7]
LSTRB
IPIPE1
IPIPE0
AN0[7]
TAGHI
KWH7
KWH6
KWH5
ECLK
XIRQ
R/W
IRQ
—
—
—
—
—
—
Pin Name
Funct. 3
ETRIG1
ETRIG0
XCLKS
TAGLO
MODC
MOSI2
MODB
MODA
SCK2
SS2
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Pin Name
Funct. 4
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Pin Name
Funct. 5
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
VDDPLL
VDDPLL
VDDPLL
Supply
Power
VDDR
VDDR
VDDX
VDDR
VDDA
VDDA
VDDA
VDDA
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
N.A.
Always
PERH/
PERH/
PERH/
PUCR
PUCR
PUCR
PUCR
PUCR
PUCR
PUCR
PUCR
PPSH
PPSH
PPSH
CTRL
None
None
None
None
None
NA
NA
NA
NA
NA
Up
Internal Pull
While RESET
While RESET
Resistor
pin is low:
pin is low:
Down
Down
Disabled
Disabled
Disabled
Disabled
Disabled
Reset
None
None
State
None
None
None
NA
NA
NA
NA
NA
Up
Up
Up
Up
Up
Up
Up
Oscillator Pins
External Reset
Test Input
Voltage Regulator Enable Input
PLL Loop Filter
Background Debug, Tag High, Mode
Input
Port AD Input, Analog Input AN7
of ATD1, External Trigger Input of
ATD1
Port AD Inputs, Analog Inputs
AN[6:0] of ATD1
Port AD Input, Analog Input AN7 of
ATD0, External Trigger Input of ATD0
Port AD Inputs, Analog Inputs
AN[6:0] of ATD0
Port A I/O, Multiplexed Address/Data
Port B I/O, Multiplexed Address/Data
Port E I/O, Access, Clock Select
Port E I/O, Pipe Status, Mode Input
Port E I/O, Pipe Status, Mode Input
Port E I/O, Bus Clock Output
Port E I/O, Byte Strobe, Tag Low
Port E I/O, R/W in expanded modes
Port E Input, Maskable Interrupt
Port E Input, Non Maskable Interrupt
Port H I/O, Interrupt, SS of SPI2
Port H I/O, Interrupt, SCK of SPI2
Port H I/O, Interrupt, MOSI of SPI2
Description