MCF51JU128VHS FREESCALE [Freescale Semiconductor, Inc], MCF51JU128VHS Datasheet - Page 48

• Manufacturer Part Number: MCF51JU128VHS
• Description: MCF51JU128
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Communication interfaces
48
38
Num.
(CPOL
(CPOL
(OUTPUT)
(OUTPUT)
(OUTPUT)
(OUTPUT)
10
11
1
2
3
4
5
6
7
8
9
SPSCK
1.If configured as output
2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB.
(INPUT)
SPSCK
MISO
MOSI
SS
=
=
1
0)
1)
t
Symbol
PORT DATA
WSPSCK
t
SPSCK
t
t
Lead
t
t
t
f
Lag
t
HO
SU
t
dis
t
op
HI
a
v
8
MCF51JU128 Advance Information Data Sheet, Rev. 1, 08/2011.
Frequency of operation
SPSCK period
Enable lead time
Enable lag time
Clock (SPSCK) high or low time
Data setup time (inputs)
Data hold time (inputs)
Slave access time
Slave MISO disable time
Data valid (after SPSCK edge)
Data hold time (outputs)
Description
3
MASTER MSB OUT
Figure 18. SPI master mode timing (CPHA=1)
5
6
MSB IN
2
Table 35. SPI slave mode timing
7
2
5
Table continues on the next page...
2
<<CLASSIFICATION>>
<<NDA MESSAGE>>
10
10
BIT 6 . . . 1
9
Preliminary
BIT 6 . . . 1
11
11
t
MASTER LSB OUT
4 x t
BUS
19.5
Min.
—
—
—
0
1
1
0
0
BUS
- 30
LSB IN
f
Max.
BUS
t
t
BUS
BUS
27
—
—
—
—
—
—
—
4
/4
Freescale Semiconductor, Inc.
PORT DATA
t
t
Unit
BUS
BUS
Hz
ns
ns
ns
ns
ns
ns
ns
ns
data active
as defined
in
f
from high-
Comment
impedanc
impedanc
Hold time
bus clock
BUS
t
BUS
Time to
to high-
e state
e state
Table
f
BUS
—
—
—
—
—
—
—
is the
= 1/
9.