MC9S08GT16 MOTOROLA [Motorola, Inc], MC9S08GT16 Datasheet - Page 210
MC9S08GT16
Manufacturer Part Number
MC9S08GT16
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC9S08GT16.pdf
(290 pages)
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Inter-Integrated Circuit (IIC) Module
13.2.1.8
The clock synchronization mechanism can be used as a handshake in data transfer. Slave devices may hold
the SCL low after completion of one byte transfer (9 bits). In such case, it halts the bus clock and forces
the master clock into wait states until the slave releases the SCL line.
13.2.1.9
The clock synchronization mechanism can be used by slaves to slow down the bit rate of a transfer. After
the master has driven SCL low the slave can drive SCL low for the required period and then release it. If
the slave SCL low period is greater than the master SCL low period then the resulting SCL bus signal low
period is stretched.
13.3
The IIC is disabled after reset. The IIC cannot cause an MCU reset.
210
Resets
SCL1
SCL2
SCL
Handshaking
Clock Stretching
INTERNAL COUNTER RESET
Figure 13-4. IIC Clock Synchronization
MC9S08GB/GT Data Sheet, Rev. 2.3
DELAY
START COUNTING HIGH PERIOD
Freescale Semiconductor
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