MC9S08GT16 MOTOROLA [Motorola, Inc], MC9S08GT16 Datasheet - Page 120
MC9S08GT16
Manufacturer Part Number
MC9S08GT16
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC9S08GT16.pdf
(290 pages)
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Internal Clock Generator (ICG) Module
LOCRE — Loss of Clock Reset Enable
RFD — Reduced Frequency Divider
7.5.3
CLKST — Clock Mode Status
120
The LOCRE bit determines how the system handles a loss of clock condition.
The RFD bits control the value of the divider following the clock select circuitry. The value specified
by the RFD bits establishes the division factor (R) applied to the selected output clock source. Writes
to the RFD bits will not take effect if a previous write is not complete.
The CLKST bits indicate the current clock mode. The CLKST bits don’t update immediately after a
write to the CLKS bits due to internal synchronization between clock domains.
1 = Generate a reset request on loss of clock.
0 = Generate an interrupt request on loss of clock.
ICG Status Register 1 (ICGS1)
Reset:
Read:
Write:
Table 7-8. RFD Reduced Frequency Divider Select
Bit 7
0
Figure 7-15. ICG Status Register 1 (ICGS1)
CLKST
RFD
000
001
010
011
100
101
110
111
= Unimplemented or Reserved
MC9S08GB/GT Data Sheet, Rev. 2.3
6
0
REFST
5
0
Division Factor (R)
LOLS
÷128
÷16
÷32
÷64
4
0
÷1
÷2
÷4
÷8
LOCK
3
0
LOCS
2
0
ERCS
Freescale Semiconductor
1
0
ICGIF
Bit 0
1
0
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