MC908JL16CFAE FREESCALE [Freescale Semiconductor, Inc], MC908JL16CFAE Datasheet - Page 45

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MC908JL16CFAE

Manufacturer Part Number
MC908JL16CFAE
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Chapter 4
System Integration Module (SIM)
4.1 Introduction
This section describes the system integration module (SIM), which supports up to 24 external and/or
internal interrupts. Together with the CPU, the SIM controls all MCU activities. A block diagram of the SIM
is shown in
controller that coordinates CPU and exception timing. The SIM is responsible for:
Freescale Semiconductor
Signal Name
OSCOUT
PORRST
Bus clock generation and control for CPU and peripherals
Master reset control, including power-on reset (POR) and COP timeout
Interrupt control:
CPU enable/disable timing
Modular architecture expandable to 128 interrupt sources
IRST
ICLK
R/W
IAB
IDB
Stop/wait/reset/break entry and recovery
Internal clock control
Acknowledge timing
Arbitration control timing
Vector address generation
Figure
4-1.
Internal oscillator clock
The XTAL or RC frequency divided by two. This signal is again divided by two in the SIM to
generate the internal bus clocks. (Bus clock = OSCOUT ÷ 2)
Internal address bus
Internal data bus
Signal from the power-on reset module to the SIM
Internal reset signal
Read/write signal
Figure 4-2
Table 4-1. Signal Name Conventions
is a summary of the SIM I/O registers. The SIM is a system state
MC68HC908JL16 Data Sheet, Rev. 1.1
Description
45

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