MC908JL16CFAE FREESCALE [Freescale Semiconductor, Inc], MC908JL16CFAE Datasheet - Page 179
MC908JL16CFAE
Manufacturer Part Number
MC908JL16CFAE
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC908JL16CFAE.pdf
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Chapter 16
Development Support
16.1 Introduction
This section describes the break module, the monitor read-only memory (MON), and the monitor mode
entry methods.
16.2 Break Module (BRK)
The break module can generate a break interrupt that stops normal program flow at a defined address to
enter a background program.
Features include:
16.2.1 Functional Description
When the internal address bus matches the value written in the break address registers, the break module
issues a breakpoint signal (BKPT) to the SIM. The SIM then causes the CPU to load the instruction
register with a software interrupt instruction (SWI) after completion of the current CPU instruction. The
program counter vectors to $FFFC and $FFFD ($FEFC and $FEFD in monitor mode).
The following events can cause a break interrupt to occur:
When a CPU generated address matches the contents of the break address registers, the break interrupt
begins after the CPU completes its current instruction. A return from interrupt instruction (RTI) in the break
routine ends the break interrupt and returns the MCU to normal operation.
Figure 16-1
Freescale Semiconductor
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Accessible input/output (I/O) registers during the break Interrupt
Central processor unit (CPU) generated break interrupts
Software-generated break interrupts
Computer operating properly (COP) disabling during break interrupts
A CPU-generated address (the address in the program counter) matches the contents of the break
address registers.
Software writes a logic one to the BRKA bit in the break status and control register.
shows the structure of the break module.
MC68HC908JL16 Data Sheet, Rev. 1.1
179
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