DSPIC30F5011 MICROCHIP [Microchip Technology], DSPIC30F5011 Datasheet - Page 216

• Manufacturer Part Number: DSPIC30F5011
• Description: High-Performance Digital Signal Controllers
• Manufacturer: MICROCHIP [Microchip Technology]

dsPIC30F5011/5013
UART Operation
Unit ID Locations............................................................... 135
Universal Asynchronous Receiver Transmitter
DS70116C-page 214
Receive Buffer Overrun Error (OERR Bit) ................ 100
Receive Interrupt....................................................... 100
Receiving Data.......................................................... 100
Receiving in 8-bit or 9-bit Data Mode........................ 100
Reception Error Handling.......................................... 100
Transmit Break.......................................................... 100
Transmit Buffer (UxTXB)............................................. 99
Transmit Interrupt...................................................... 100
Transmitting Data........................................................ 99
Transmitting in 8-bit Data Mode .................................. 99
Transmitting in 9-bit Data Mode .................................. 99
UART1 Register Map ................................................ 103
UART2 Register Map ................................................ 103
Idle Mode .................................................................. 102
Sleep Mode ............................................................... 102
(UART) Module ........................................................... 97
Preliminary
W
Wake-up from Sleep ......................................................... 135
Wake-up from Sleep and Idle ............................................. 43
Watchdog Timer
Watchdog Timer (WDT)............................................ 135, 146
WWW, On-Line Support ....................................................... 4
Timing Characteristics .............................................. 182
Timing Requirements................................................ 183
Enabling and Disabling ............................................. 146
Operation .................................................................. 146
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