LPC1111 NXP [NXP Semiconductors], LPC1111 Datasheet - Page 28

• Manufacturer Part Number: LPC1111
• Description: 32-bit ARM Cortex-M0 microcontroller; up to 32 kB flash and 8 kB SRAM
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
LPC1111_12_13_14_1
Product data sheet
7.16.6 External interrupt inputs
7.16.7 Memory mapping control
7.17 Emulation and debugging
All GPIO pins can be level or edge sensitive interrupt inputs.
The Cortex-M0 incorporates a mechanism that allows remapping the interrupt vector table
to alternate locations in the memory map. This is controlled via the Vector Table Offset
Register contained in the NVIC.
The vector table may be located anywhere within the bottom 1 GB of Cortex-M0 address
space. The vector table must be located on a 128 word (512 byte) boundary.
Debug functions are integrated into the ARM Cortex-M0. Serial wire debug with four
breakpoints and two watchpoints is supported.
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 16 April 2010
32-bit ARM Cortex-M0 microcontroller
LPC1111/12/13/14
© NXP B.V. 2010. All rights reserved.
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