LPC1111 NXP [NXP Semiconductors], LPC1111 Datasheet - Page 11

• Manufacturer Part Number: LPC1111
• Description: 32-bit ARM Cortex-M0 microcontroller; up to 32 kB flash and 8 kB SRAM
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
Table 3.
[1]
[2]
[3]
[4]
[5]
Table 4.
LPC1111_12_13_14_1
Product data sheet
Symbol
XTALIN
XTALOUT
V
Symbol
PIO0_0 to PIO0_11
RESET/PIO0_0
PIO0_1/CLKOUT/
CT32B0_MAT2
PIO0_2/SSEL0/
CT16B0_CAP0
PIO0_3
PIO0_4/SCL
PIO0_5/SDA
PIO0_6/SCK0
PIO0_7/CTS
PIO0_8/MISO0/
CT16B0_MAT0
SS
See
reset the chip and wake up from Deep power-down mode.
5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis (see
I
5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors, configurable hysteresis, and analog input.
When configured as a ADC input, digital section of the pad is disabled and the pin is not 5 V tolerant (see
When the system oscillator is not used, connect XTALIN and XTALOUT as follows: XTALIN can be left floating or can be grounded
(grounding is preferred to reduce susceptibility to noise). XTALOUT should be left floating.
2
C-bus pads compliant with the I
Figure 27
LPC1113/14 pin description table (LQFP48 package)
LPC1114 pin description table (PLCC44 package)
for the reset pad configuration. RESET functionality is not available in Deep power-down mode. Use the WAKEUP pin to
Pin
6
7
5; 41
Pin
7
8
14
18
19
20
26
27
31
[5]
[5]
[1]
[2]
[2]
[2]
[3]
[3]
[2]
[2]
[2]
2
C-bus specification for I
Type
I
O
I
Type
I/O
I
I/O
I/O
O
O
I/O
O
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I/O
I/O
O
All information provided in this document is subject to legal disclaimers.
Description
Input to the oscillator circuit and internal clock generator circuits. Input
voltage must not exceed 1.8 V.
Output from the oscillator amplifier.
Ground.
Description
Port 0 — Port 0 is a 12-bit I/O port with individual direction and function
controls for each bit. The operation of port 0 pins depends on the function
selected through the IOCONFIG register block.
RESET — External reset input: A LOW on this pin resets the device,
causing I/O ports and peripherals to take on their default states, and
processor execution to begin at address 0.
PIO0_0 — General purpose digital input/output pin.
PIO0_1 — General purpose digital input/output pin. A LOW level on this pin
during reset starts the ISP command handler.
CLKOUT — Clockout pin.
CT32B0_MAT2 — Match output 2 for 32-bit timer 0.
PIO0_2 — General purpose digital input/output pin.
SSEL0 — Slave Select for SPI0.
CT16B0_CAP0 — Capture input 0 for 16-bit timer 0.
PIO0_3 — General purpose digital input/output pin.
PIO0_4 — General purpose digital input/output pin (open-drain).
SCL — I
Fast-mode Plus is selected in the I/O configuration register.
PIO0_5 — General purpose digital input/output pin (open-drain).
SDA — I
Fast-mode Plus is selected in the I/O configuration register.
PIO0_6 — General purpose digital input/output pin.
SCK0 — Serial clock for SPI0.
PIO0_7 — General purpose digital input/output pin (high-current output
driver).
CTS — Clear To Send input for UART.
PIO0_8 — General purpose digital input/output pin.
MISO0 — Master In Slave Out for SPI0.
CT16B0_MAT0 — Match output 0 for 16-bit timer 0.
Rev. 01 — 16 April 2010
2
C standard mode and I
2
2
C-bus, open-drain clock input/output. High-current sink only if I
C-bus, open-drain data input/output. High-current sink only if I
…continued
2
C Fast-mode Plus.
32-bit ARM Cortex-M0 microcontroller
LPC1111/12/13/14
Figure
© NXP B.V. 2010. All rights reserved.
26).
Figure
11 of 59
2
2
C
26).
C