MN101E29G PANASONIC [Panasonic Semiconductor], MN101E29G Datasheet

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MN101E29G

Manufacturer Part Number
MN101E29G
Description
MN101E29G
Manufacturer
PANASONIC [Panasonic Semiconductor]
Datasheet

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 Interrupts
 Timer Counter
 Serial interface
 DMA controller
 I/O Pins
Type
Internal ROM type
ROM (byte)
RAM (byte)
Package (Lead-free)
Minimum Instruction
Execution Time
MN101E29G
6 external interrupts, 28 internal interrupts
RESET, Watchdog, External 0 to 4, Timer 0 to 4, Timer 6, Timer 7 (2 systems), Timer 8 (2 systems), Timer 9 (2 systems), Time
base, Serial 0 (2 systems), Serial1 (2 systems), Serial 2 (2 systems), Serial 3 (2 systems), Serial 4, Serial 5, A/ D conversion fi nish,
Automatic transfer (2 systems), Key interrupts
Timer counter 0 : 8-bit × 1
Timer counter 1 : 8-bit × 1
Timer counter 2 : 8-bit × 1
Timer counter 3 : 8-bit × 1
Timer counter 4 : 8-bit × 1
Timer counter 6 : 8-bit free run timer, time base timer
Timer counter 7 : 16-bit × 1
Timer counter 8 : 16-bit × 1
Timer counter 9 : 16-bit × 1
Timer counter A : 8-bit × 1 (event count, Serial transfer clock timer, clock for function (timer, serial, LCD))
Watchdog timer
Serial 0 ~ 3 : UART (full duplex) / synchronous × 1
Serial 4 : multi master I²C / synchronous × 1
Serial 5 : I²C slave × 1
2 systems (External request/internal event request/software request maximum transfer cycles are 255)
I/O
(timer pulse output, event count, added pulse (2-bit) system PWM output, generation of remote control carrier, simple
pulse measurement, real time output control)
(timer pulse output, event count, 16-bit cascade connected (timer 0, 1) timer synchronous output event)
(timer pulse output, event count, added pulse (2-bit) system PWM output, simple pulse measurement, 24-bit cascade
connected (timer 0, 1, 2), timer synchronous output event, real timer output control)
(timer pulse output, event count, generation of remote control carrier, 16-bit cascade connected (timer 2, 3), 32-bit
cascade connected (timer 0, 1, 2, 3))
(timer pulse output, added pulse (2-bit) system PWM output, event count, serial transfer clock, simple pulse measurement)
(timer pulse output, event count, High accuracy PWM, High performance IGBT output (cycle/duty continuous variable) timer
synchronous output event, input capture (Both edge available), real timer output control), double buffer compare register
(timer pulse output, event count, High accuracy PWM output (cycle/duty continuous variable) pulse width measurement,
input capture (Both edge available), 32-bit cascade connected (Timer 7 , 8), 32-bitPWM output, synchronous output
event), double buffer compare register
(timer pulse output, event count, High accuracy PWM output (cycle/duty continuous variable), pulse width
measurement, input capture (Both edge available), real timer output control), double buffer compare register
* at internal 2 , 3 , 4 , 5 , 6 , 8 , 10 times oscillation used
90
50 ns (at 2.2 V to 5.5 V, 20 MHz)
common use, Specifi ed pull-up/pull-down resistor available, Input/output selectable (bit-unit)
MN101E29G
Mask ROM
QFP100-P-1818B (Under development)
128K
6K
50 ns (at 2.2 V to 5.5 V, 20 MHz)
MN101EF29G
FLASH
MAD00062AEM

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MN101E29G Summary of contents

Page 1

... Serial 5 : I²C slave × 1  DMA controller 2 systems (External request/internal event request/software request maximum transfer cycles are 255)  I/O Pins I/O 90 MN101E29G Mask ROM QFP100-P-1818B (Under development ( MHz) common use, Specifi ed pull-up/pull-down resistor available, Input/output selectable (bit-unit) MN101EF29G ...

Page 2

... MN101E29G 100 QFP100-P-1818B MN101E29G P41, SBI3B, RXD3B, SEG34 50 P40, SBO3B, TXD3B, SEG35 49 P36, SEG36 48 P35, SBI4B, SEG37 47 P34, SBT4B, SCL4B, SEG38 46 P33, SBO4B, SDA4B, SEG39 45 P32, SBT2B, SEG40 44 P31, SBI2B, RXD2B, SEG41 43 42 ...

Page 3

Request for your special attention and precautions in using the technical information and (1) If any of the products or technical information described in this book exported or provided to non-residents, the laws and regulations of the ...

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