P89LPC9151 NXP [NXP Semiconductors], P89LPC9151 Datasheet - Page 61
P89LPC9151
Manufacturer Part Number
P89LPC9151
Description
8-bit microcontroller with accelerated two-clock 80C51 core, 2 kB 3 V byte-erasable flash with 8-bit ADC
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.P89LPC9151.pdf
(91 pages)
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P89LPC9151_61_71_2
Product data sheet
Fig 21. ADC block diagram
8.4.1 Fixed channel, single conversion mode
8.4.2 Fixed channel, continuous conversion mode
8.4.3 Auto scan, single conversion mode
8.4.4 Auto scan, continuous conversion mode
8.3 Block diagram
8.4 ADC operating modes
A single input channel can be selected for conversion. A single conversion will be
performed and the result placed in the result register which corresponds to the selected
input channel. An interrupt, if enabled, will be generated after the conversion completes.
A single input channel can be selected for continuous conversion. The results of the
conversions will be sequentially placed in the four result register. The user may select
whether an interrupt can be generated after every four conversions. Additional conversion
results will again cycle through the four result register, overwriting the previous results.
Continuous conversions continue until terminated by the user.
Any combination of the four input channels can be selected for conversion. A single
conversion of each selected input will be performed and the result placed in the result
register which corresponds to the selected input channel. An interrupt, if enabled, will be
generated after all selected channels have been converted. If only a single channel is
selected this is equivalent to single channel, single conversion mode.
Any combination of the four input channels can be selected for conversion. A conversion
of each selected input will be performed and the result placed in the result register which
corresponds to the selected input channel. An interrupt, if enabled, will be generated after
8-bit conversion time of ≥ 1.61 μs at an A/D clock of 8.0 MHz.
Interrupt or polled operation.
Boundary limits interrupt.
DAC output to a port pin with high output impedance.
Clock divider.
Power-down mode.
Edge triggered.
INPUT
MUX
Rev. 02 — 9 February 2010
comp
DAC1
P89LPC9151/9161/9171
SAR
cclk
8
8-bit microcontroller with 8-bit ADC
002aaa783
© NXP B.V. 2010. All rights reserved.
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