P89LPC9151 NXP [NXP Semiconductors], P89LPC9151 Datasheet - Page 41
P89LPC9151
Manufacturer Part Number
P89LPC9151
Description
8-bit microcontroller with accelerated two-clock 80C51 core, 2 kB 3 V byte-erasable flash with 8-bit ADC
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.P89LPC9151.pdf
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P89LPC9151_61_71_2
Product data sheet
7.12 Memory organization
7.13 Data RAM arrangement
7.14 Interrupts
The various P89LPC9151/9161/9171 memory spaces are as follows:
The 256 bytes of on-chip RAM are organized as shown in
Table 12.
The P89LPC9151/9161/9171 uses a four priority level interrupt structure. This allows
great flexibility in controlling the handling of the many interrupt sources.
The P89LPC9151/9171 supports 13 interrupt sources: external interrupts 0 and 1, timers
0 and 1, serial port TX, serial port RX, combined serial port RX/TX, brownout detect,
watchdog/RTC, I
The P89LPC9161 supports 13 interrupt sources: external interrupts 0, timers 0 and 1,
serial port TX, serial port RX, combined serial port RX/TX, brownout detect,
watchdog/RTC, I
Each interrupt source can be individually enabled or disabled by setting or clearing a bit in
the interrupt enable registers IEN0 or IEN1. The IEN0 register also contains a global
disable bit, EA, which disables all interrupts.
Type
DATA
IDATA
•
•
•
•
•
DATA
128 bytes of internal data memory space (00H:7FH) accessed via direct or indirect
addressing, using instructions other than MOVX and MOVC. All or part of the Stack
may be in this area.
IDATA
Indirect Data. 256 bytes of internal data memory space (00H:FFH) accessed via
indirect addressing using instructions other than MOVX and MOVC. All or part of the
Stack may be in this area. This area includes the DATA area and the 128 bytes
immediately above it.
SFR
Special Function Registers. Selected CPU registers and peripheral control and status
registers, accessible only via direct addressing.
XDATA
‘External’ Data or Auxiliary RAM. Duplicates the classic 80C51 64 kB memory space
addressed via the MOVX instruction using the DPTR, R0, or R1. All or part of this
space could be implemented on-chip. Extended SFRs located in XDATA.
CODE
64 kB of Code memory space, accessed as part of program execution and via the
MOVC instruction. The P89LPC9151/9161/9171 has 2 kB on-chip Code memory.
On-chip data memory usages
Data RAM
Memory that can be addressed directly and indirectly
Memory that can be addressed indirectly
2
2
C-bus, keyboard, comparators 1 and 2, A/D completion.
C-bus, keyboard, comparators 1 and 2, SPI, ADC completion.
Rev. 02 — 9 February 2010
P89LPC9151/9161/9171
8-bit microcontroller with 8-bit ADC
Table
12.
© NXP B.V. 2010. All rights reserved.
Size (bytes)
128
256
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