AT32UC3A0512-ALTES ATMEL [ATMEL Corporation], AT32UC3A0512-ALTES Datasheet - Page 79

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AT32UC3A0512-ALTES

Manufacturer Part Number
AT32UC3A0512-ALTES
Description
AVR32 32-Bit Microcontroller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
15.4.9
15.4.10
15.4.11
15.4.12
32058FS–AVR32–08/08
HMatrix
ADC
ABDAC
FLASHC
1. HMatrix fixed priority arbitration does not work
1.
2.
3. Sleep Mode activation needs additional A to D conversion
1. Audio Bitstream DAC is not functional.
1. The address of Flash General Purpose Fuse Register Low (FGPFRLO) is 0xFFFE140C
2. The command Quick Page Read User Page(QPRUP) is not functional.
3. PAGEN Semantic Field for Program GP Fuse Byte is WriteData[7:0], ByteAddress[1:0]
4. On AT32UC3A0512 and AT32UC3A1512, corrupted read in flash after FLASHC WP,
Fixed priority arbitration does not work.
Fix/Workaround
Use Round-Robin arbitration instead.
The ADC does not work properly when more than one channel is enabled.
Fix/Workaround
Do not use the ADC with more than one channel enabled at a time.
The OVRE flag does not clear properly if read simultaneously to an end of conversion.
Fix/Workaround
None.
If the ADC sleep mode is activated when the ADC is idle the ADC will not enter sleep mode
before after the next AD conversion.
Fix/Workaround
Activate the sleep mode in the mode register and then perform an AD conversion.
Fix/Workaround
Do not use the ABDAC on revE.
on revE instead of 0xFFFE1410.
Fix/Workaround
None.
Fix/Workaround
None.
on revision E instead of WriteData[7:0], ByteAddress[2:0].
Fix/Workaround
None.
EP, EA, WUP, EUP commands may happen
ADC possible miss on DRDY when disabling a channel
ADC OVRE flag sometimes not reset on Status Register read
AT32UC3A
79

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