AT32UC3A0512-ALTES ATMEL [ATMEL Corporation], AT32UC3A0512-ALTES Datasheet - Page 36
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AT32UC3A0512-ALTES
Manufacturer Part Number
AT32UC3A0512-ALTES
Description
AVR32 32-Bit Microcontroller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT32UC3A0512-ALTES.pdf
(86 pages)
- Current page: 36 of 86
- Download datasheet (2Mb)
10.11.8
10.11.9
10.11.10 Pulse Width Modulation Controller
32058FS–AVR32–08/08
Serial Synchronous Controller
Timer Counter
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RS485 with driver control signal
ISO7816, T = 0 or T = 1 Protocols for interfacing with smart cards
IrDA modulation and demodulation
Test Modes
SPI Mode
Supports Connection of Two Peripheral DMA Controller Channels (PDC)
Provides serial synchronous communication links used in audio and telecom applications (with
CODECs in Master or Slave Modes, I2S, TDM Buses, Magnetic Card Reader, etc.)
Contains an independent receiver and transmitter and a common clock divider
Offers a configurable frame sync and data length
Receiver and transmitter can be programmed to start automatically or on detection of different
event on the frame sync signal
Receiver and transmitter include a data signal, a clock signal and a frame synchronization signal
Three 16-bit Timer Counter Channels
Wide range of functions including:
Each channel is user-configurable and contains:
Two global registers that act on all three TC Channels
7 channels, one 20-bit counter per channel
Common clock generator, providing Thirteen Different Clocks
Independent channel programming
– Optional Manchester Encoding
– NACK handling, error counter with repetition and iteration limit
– Communication at up to 115.2 Kbps
– Remote Loopback, Local Loopback, Automatic Echo
– Master or Slave
– Serial Clock Programmable Phase and Polarity
– SPI Serial Clock (SCK) Frequency up to Internal Clock Frequency PBA/4
– Offers Buffer Transfer without Processor Intervention
– Frequency Measurement
– Event Counting
– Interval Measurement
– Pulse Generation
– Delay Timing
– Pulse Width Modulation
– Up/down Capabilities
– Three external clock inputs
– Five internal clock inputs
– Two multi-purpose input/output signals
– A Modulo n counter providing eleven clocks
– Two independent Linear Dividers working on modulo n counter outputs
– Independent Enable Disable Commands
– Independent Clock
– Independent Period and Duty Cycle, with Double Bufferization
– Programmable selection of the output waveform polarity
– Programmable center or left aligned output waveform
AT32UC3A
36
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