AT32UC3A0512-ALTES ATMEL [ATMEL Corporation], AT32UC3A0512-ALTES Datasheet - Page 69

• Manufacturer Part Number: AT32UC3A0512-ALTES
• Description: AVR32 32-Bit Microcontroller
• Manufacturer: ATMEL [ATMEL Corporation]

15.2.7
15.2.8
15.2.9
15.2.10
32058FS–AVR32–08/08
GPIO
TWI
SDRAMC
Processor and Architecture
1. Some GPIO VIH (input high voltage) are 3.6V max instead of 5V tolerant
1. The TWI RXRDY flag in SR register is not reset when a software reset is performed.
1.
1. LDM instruction with PC in the register list and without ++ increments Rp
2. RETE instruction does not clear SREG[L] from interrupts.
Workaround/fix
The same PID should not be assigned to more than one channel.
Only 11 GPIOs remain 5V tolerant (VIHmax=5V): PB01, PB02, PB03, PB10, PB19, PB20,
PB21, PB22, PB23, PB27, PB28.
Workaround/fix
None.
Fix/Workaround
After a Software Reset, the register TWI RHR must be read.
Code execution from SDRAM does not work.
Fix/Workaround
Do not run code from SDRAM.
For LDM with PC in the register list: the instruction behaves as if the ++ field is always set, ie
the pointer is always updated. This happens even if the ++ field is cleared. Specifically, the
increment of the pointer is done in parallel with the testing of R12.
Fix/Workaround
None.
The RETE instruction clears SREG[L] as expected from exceptions.
Fix/Workaround
When using the STCOND instruction, clear SREG[L] in the stacked value of SR before
returning from interrupts with RETE.
Code execution from external SDRAM does not work
AT32UC3A
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