ATMEGA48V_06 ATMEL [ATMEL Corporation], ATMEGA48V_06 Datasheet - Page 80
ATMEGA48V_06
Manufacturer Part Number
ATMEGA48V_06
Description
8-bit Microcontroller with 8K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATMEGA48V_06.pdf
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ATmega48/88/168
(one)) to serve this function. The OC1A pin is also the output pin for the PWM mode timer
function.
PCINT1: Pin Change Interrupt source 1. The PB1 pin can serve as an external interrupt source.
• ICP1/CLKO/PCINT0 – Port B, Bit 0
ICP1, Input Capture Pin: The PB0 pin can act as an Input Capture Pin for Timer/Counter1.
CLKO, Divided System Clock: The divided system clock can be output on the PB0 pin. The
divided system clock will be output if the CKOUT Fuse is programmed, regardless of the
PORTB0 and DDB0 settings. It will also be output during reset.
PCINT0: Pin Change Interrupt source 0. The PB0 pin can serve as an external interrupt source.
Table 12-4
shown in
MISO signal, while MOSI is divided into SPI MSTR OUTPUT and SPI SLAVE INPUT.
Table 12-4.
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
Figure 12-5 on page
and
PB7/XTAL2/
TOSC2/PCINT7
INTRC • EXTCK+
AS2
0
INTRC • EXTCK+
AS2
0
0
0
INTRC • EXTCK +
AS2 + PCINT7 •
PCIE0
(INTRC + EXTCK) •
AS2
PCINT7 INPUT
Oscillator Output
Overriding Signals for Alternate Functions in PB7..PB4
Table 12-5
(1)
relate the alternate functions of Port B to the overriding signals
76. SPI MSTR INPUT and SPI SLAVE OUTPUT constitute the
PB6/XTAL1/
TOSC1/PCINT6
INTRC + AS2
0
INTRC + AS2
0
0
0
INTRC + AS2 +
PCINT6 • PCIE0
INTRC • AS2
PCINT6 INPUT
Oscillator/Clock
Input
(1)
PB5/SCK/
PCINT5
SPE • MSTR
PORTB5 • PUD
SPE • MSTR
0
SPE • MSTR
SCK OUTPUT
PCINT5 • PCIE0
1
PCINT5 INPUT
SCK INPUT
–
PB4/MISO/
PCINT4
SPE • MSTR
PORTB4 • PUD
SPE • MSTR
0
SPI SLAVE
OUTPUT
PCINT4 • PCIE0
1
PCINT4 INPUT
SPI MSTR INPUT
–
SPE • MSTR
2545J–AVR–12/06
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