ATMEGA48V_06 ATMEL [ATMEL Corporation], ATMEGA48V_06 Datasheet - Page 225

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ATMEGA48V_06

Manufacturer Part Number
ATMEGA48V_06
Description
8-bit Microcontroller with 8K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
20.7.2
2545J–AVR–12/06
Master Receiver Mode
Figure 20-12. Formats and States in the Master Transmitter Mode
In the Master Receiver mode, a number of data bytes are received from a Slave Transmitter
(Slave see
ted. The format of the following address packet determines whether Master Transmitter or
Master Receiver mode is to be entered. If SLA+W is transmitted, MT mode is entered, if SLA+R
is transmitted, MR mode is entered. All the status codes mentioned in this section assume that
the prescaler bits are zero or are masked to zero.
Successfull
transmission
to a slave
receiver
Next transfer
started with a
repeated start
condition
Not acknowledge
received after the
slave address
Not acknowledge
received after a data
byte
Arbitration lost in slave
address or data byte
Arbitration lost and
addressed as slave
Figure
From master to slave
From slave to master
$08
S
20-13). In order to enter a Master mode, a START condition must be transmit-
SLA
W
MT
A or A
DATA
$18
$20
$38
$68
A
A
A
$78
Other master
Other master
n
continues
continues
P
$B0
DATA
A
Any number of data bytes
and their associated acknowledge bits
This number (contained in TWSR) corresponds
to a defined state of the 2-Wire Serial Bus. The
prescaler bits are zero or masked to zero
A or A
ATmega48/88/168
$28
$30
$38
To corresponding
states in slave mode
A
A
Other master
$10
continues
P
R
P
S
SLA
W
R
MR
225

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