ATMEGA48V_06 ATMEL [ATMEL Corporation], ATMEGA48V_06 Datasheet - Page 45

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ATMEGA48V_06

Manufacturer Part Number
ATMEGA48V_06
Description
8-bit Microcontroller with 8K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
9. System Control and Reset
9.1
9.2
2545J–AVR–12/06
Resetting the AVR
Reset Sources
During reset, all I/O Registers are set to their initial values, and the program starts execution
from the Reset Vector. For the ATmega168, the instruction placed at the Reset Vector must be a
JMP – Absolute Jump – instruction to the reset handling routine. For the ATmega48 and
ATmega88, the instruction placed at the Reset Vector must be an RJMP – Relative Jump –
instruction to the reset handling routine. If the program never enables an interrupt source, the
Interrupt Vectors are not used, and regular program code can be placed at these locations. This
is also the case if the Reset Vector is in the Application section while the Interrupt Vectors are in
the Boot section or vice versa (ATmega88/168 only). The circuit diagram in
reset logic.
The I/O ports of the AVR are immediately reset to their initial state when a reset source goes
active. This does not require any clock source to be running.
After all reset sources have gone inactive, a delay counter is invoked, stretching the internal
reset. This allows the power to reach a stable level before normal operation starts. The time-out
period of the delay counter is defined by the user through the SUT and CKSEL Fuses. The dif-
ferent selections for the delay period are presented in
The ATmega48/88/168 has four sources of reset:
• Power-on Reset. The MCU is reset when the supply voltage is below the Power-on Reset
• External Reset. The MCU is reset when a low level is present on the RESET pin for longer than
• Watchdog System Reset. The MCU is reset when the Watchdog Timer period expires and the
• Brown-out Reset. The MCU is reset when the supply voltage V
threshold (V
the minimum pulse length.
Watchdog System Reset mode is enabled.
threshold (V
Table 27-3
POT
BOT
).
) and the Brown-out Detector is enabled.
defines the electrical parameters of the reset circuitry.
”Clock Sources” on page
ATmega48/88/168
CC
is below the Brown-out Reset
Figure 9-1
28.
shows the
45

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