AT90USB1286-16MU ATMEL [ATMEL Corporation], AT90USB1286-16MU Datasheet - Page 311

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AT90USB1286-16MU

Manufacturer Part Number
AT90USB1286-16MU
Description
Microcontroller with 64/128K Bytes of ISP Flash and USB Controller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet

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0
7593A–AVR–02/06
Set by hardware when a new USB message is stored in the current bank of the Pipe. This trig-
gers an interrupt if the RXINE bit is set in the UPIENX register.
Shall be cleared to handshake the interrupt. Setting by software has no effect.
• 7 - FLERRE - Flow Error Interrupt enable
Set to enable the OVERFI and UNDERFI interrupts.
Clear to disable the OVERFI and UNDERFI interrupts.
• 6 - NAKEDE -NAK Handshake Received Interrupt Enable
Set to enable the NAKEDI interrupt.
Clear to disable the NAKEDI interrupt.
• 5 - Reserved
The value read from these bits is always 0. Do not set these bits.
• 4 - PERRE -PIPE Error Interrupt Enable
Set to enable the PERRI interrupt.
Clear to disable the PERRI interrupt.
• 3 - TXSTPE - SETUP Bank ready Interrupt Enable
Set to enable the TXSTPI interrupt.
Clear to disable the TXSTPI interrupt.
• 2 - TXOUTE - OUT Bank ready Interrupt Enable
Set to enable the TXOUTI interrupt.
Clear to disable the TXOUTI interrupt.
• 1 - RXSTALLE - STALL Received Interrupt Enable
Set to enable the RXSTALLI interrupt.
Clear to disable the RXSTALLI interrupt.
• 0 - RXINE - IN Data received Interrupt Enable
Set to enable the RXINI interrupt.
Clear to disable the RXINI interrupt.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
FLERRE
PDAT7
RW
RW
7
0
7
0
NAKEDE
PDAT6
RW
RW
6
0
6
0
PDAT5
RW
5
0
-
5
0
PERRE
PDAT4
RW
4
0
RW
4
0
TXSTPE
PDAT3
RW
RW
3
0
3
0
TXOUTE
PDAT2
RW
RW
2
0
2
0
AT90USB64/128
RXSTALLE
PDAT1
RW
RW
1
0
1
0
PDAT0
RXINE
RW
RW
0
0
0
0
UPDATX
UPIENX
311

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