AT90USB1286-16MU ATMEL [ATMEL Corporation], AT90USB1286-16MU Datasheet - Page 203
![no-image](/images/no-image-200.jpg)
AT90USB1286-16MU
Manufacturer Part Number
AT90USB1286-16MU
Description
Microcontroller with 64/128K Bytes of ISP Flash and USB Controller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT90USB1286-16MU.pdf
(434 pages)
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18.9.5
7593A–AVR–02/06
USART Baud Rate Registers – UBRRLn and UBRRHn
• Bit 3 – USBSn: Stop Bit Select
This bit selects the number of stop bits to be inserted by the Transmitter. The Receiver ignores
this setting.
Table 18-6.
• Bit 2:1 – UCSZn1:0: Character Size
The UCSZn1:0 bits combined with the UCSZn2 bit in UCSRnB sets the number of data bits
(Character SiZe) in a frame the Receiver and Transmitter use.
Table 18-7.
• Bit 0 – UCPOLn: Clock Polarity
This bit is used for synchronous mode only. Write this bit to zero when asynchronous mode is
used. The UCPOLn bit sets the relationship between data output change and data input sample,
and the synchronous clock (XCKn).
Table 18-8.
• Bit 15:12 – Reserved Bits
Bit
Read/Write
Initial Value
UCPOLn
UCSZn2
0
1
0
0
0
0
1
1
1
1
15
–
UBRR[7:0]
7
R
R/W
0
0
USBSn
Transmitted Data Changed (Output
of TxDn Pin)
Rising XCKn Edge
Falling XCKn Edge
USBS Bit Settings
UCSZn Bits Settings
UCPOLn Bit Settings
0
1
14
–
6
R
R/W
0
0
UCSZn1
0
0
1
1
0
0
1
1
13
–
5
R
R/W
0
0
Stop Bit(s)
1-bit
2-bit
12
–
4
R
R/W
0
0
UCSZn0
0
1
0
1
0
1
0
1
11
UBRR[11:8]
3
R/W
R/W
0
0
Received Data Sampled (Input on
RxDn Pin)
Falling XCKn Edge
Rising XCKn Edge
10
2
R/W
R/W
0
0
Character Size
5-bit
6-bit
7-bit
8-bit
Reserved
Reserved
Reserved
9-bit
9
1
R/W
R/W
0
0
AT90USB64/128
8
0
R/W
R/W
0
0
UBRRHn
UBRRLn
203
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