AT90PWM2B-16SE ATMEL [ATMEL Corporation], AT90PWM2B-16SE Datasheet - Page 146

• Manufacturer Part Number: AT90PWM2B-16SE
• Description: 8-bit Microcontroller with 8K Bytes In-System Programmable Flash
• Manufacturer: ATMEL [ATMEL Corporation]

16.8.4
16.8.4.1
16.8.4.2
146
AT90PWM2/3/2B/3B
PSC Input Configuration
Filter Enable
Signal Polarity
Figure 16-19. Burst Generation
The PSC Input Configuration is done by programming bits in configuration registers.
If the “Filter Enable” bit is set, a digital filter of 4 cycles is inserted before evaluation of the signal.
The disable of this function is mainly needed for prescaled PSC clock sources, where the noise
cancellation gives too high latency.
Important: If the digital filter is active, the level sensitivity is true also with a disturbed PSC clock
to deactivate the outputs (emergency protection of external component). Likewise when used as
fault input, PSCn Input A or Input B have to go through PSC to act on PSCOUTn0/1/2/3 output.
This way needs that CLK
(PAOCnA/B), PSCnIN0/1 input can desactivate directly the PSC output. Notice that in this case,
input is still taken into account as usually by Input Module System as soon as CLK
PSC Input Filterring
One can select the active edge (edge modes) or the active level (level modes) See PELEVnx bit
description in Section “PSC n Input A Control Register – PFRCnA”, page 16716.25.14.
PSCOUTn0
PSCOUTn1
PSCn Input A
(high level)
PSCn Input A
(low level)
PSC Input
Module X
CLK
PSC
PSC
OFF
is running. So thanks to PSC Asynchronous Output Control bit
Digital
Filter
4 x CLK
PSC
BURST
Ouput
Stage
PSCn Input A or B
PSCOUTnX
PIN
PSC
4317J–AVR–08/10
is running.