ATTINY15 ATMEL [ATMEL Corporation], ATTINY15 Datasheet - Page 26

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ATTINY15

Manufacturer Part Number
ATTINY15
Description
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet

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The Special Function IO
Register – SFIOR
26
ATtiny15L
Figure 19. Timer/Counter1 Prescaler
• Bit 7..3 – Res: Reserved Bits
These bits are reserved bits in the ATtiny15L and always read as zero.
• Bit 2 – FOC1A: Force Output Compare 1A
Writing a logical “1” to this bit forces a change in the compare match output pin PB1
(OC1A) according to the values already set in COM1A1 and COM1A0. The Force Out-
put Compare bit can be used to change the output pin without waiting for a compare
match in timer. The automatic action programmed in COM1A1 and COM1A0 happens
as if a Compare Match had occurred, but no interrupt is generated and the
Timer/Counter1 will not be cleared even if CTC1 is set. The FOC1A bit will always be
read as zero. The setting of the FOC1A bit has no effect in PWM mode.
• Bit 1 – PSR1: Prescaler Reset Timer/Counter1
When this bit is set (one) the Timer/Counter1 prescaler will be reset. The bit will be
cleared by hardware after the operation is performed. Writing a “0” to this bit will have no
effect. This bit will always be read as zero.
• Bit 0 – PSR0: Prescaler Reset Timer/Counter0
When this bit is set (one) the Timer/Counter0 prescaler will be reset. The bit will be
cleared by hardware after the operation is performed. Writing a “0” to this bit will have no
effect. This bit will always be read as zero.
Bit
$2C
Read/Write
Initial Value
(1.6 MHz)
(25.6 MHz)
CK
PSR1
PCK
7
R
0
CS10
CS11
CS12
CS13
3-BIT T/C PRESCALER
R
6
0
0
R
5
0
CLEAR
CLEAR
4
R
0
TIMER/COUNTER1 CLOCK SOURCE
R
3
0
10-BIT T/C PRESCALER
FOC1A
R/W
2
0
PSR1
R/W
1
0
PSR0
R/W
0
0
1187D–12/01
SFIOR

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