BH616UV8010AI BSI [Brilliance Semiconductor], BH616UV8010AI Datasheet - Page 4

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BH616UV8010AI

Manufacturer Part Number
BH616UV8010AI
Description
Ultra Low Power/High Speed CMOS SRAM 512K X 16 bit
Manufacturer
BSI [Brilliance Semiconductor]
Datasheet
R0201-BH616UV8010
n DATA RETENTION CHARACTERISTICS (T
n LOW V
n LOW V
n AC TEST CONDITIONS
Output
1. T
2. t
3. I
(Test Load and Input/Output Reference)
1. Including jig and scope capacitance.
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing
Reference Level
Output Load
RC
CCDR(MAX.)
A
SYMBOL
=25
I
= Read Cycle Time.
CCDR
t
V
CDR
t
O
DR
CC
CC
R
V
CE1
V
CE2
C.
BSI
CC
CC
(3)
C
is 2.5uA /10uA at V
DATA RETENTION WAVEFORM (1) (CE1 Controlled)
DATA RETENTION WAVEFORM (2) (CE2 Controlled)
L
1 TTL
(1)
t
t
Others
CLZ1
CHZ2
V
Data Retention Current
Chip Deselect to Data
Retention Time
Operation Recovery Time
, t
, t
CC
CLZ2
BDO
for Data Retention
, t
, t
PARAMETER
OHZ
BE
GND
V
, t
, t
CC
CC
OLZ
WHZ
=1.0V/2.0V and T
, t
, t
CHZ1
OW
Rise Time:
1V/ns
10%
,
ALL INPUT PULSES
V
1V/ns
0.5Vcc
C
C
CC
L
L
= 5pF+1TTL
= 30pF+1TTL
90%
V
/ 0V
V
IH
IL
t
A
t
CDR
V
CDR
=0
CE1≧V
V
CE1≧V
V
See Retention Waveform
CC
V
IN
IN
O
90%
CC
C ~ 70
A
≧V
≧V
Fall Time:
1V/ns
= -25
CC
CC
CC
CC
-0.2V or V
-0.2V or V
O
10%
TEST CONDITIONS
-0.2V or CE2≦0.2V,
-0.2V or CE2≦0.2V,
C.
O
C to +85
Data Retention Mode
Data Retention Mode
CE1≧V
4
V
CE2≦0.2V
IN
IN
V
DR
≦0.2V
≦0.2V
DR
n KEY TO SWITCHING WAVEFORMS
≧1.0V
≧1.0V
CC
O
- 0.2V
C)
WAVEFORM
V
V
CC
CC
=1.0V
=2.0V
V
V
INPUTS
MUST BE
STEADY
MAY CHANGE
FROM “H” TO “L”
MAY CHANGE
FROM “L” TO “H”
DON’T CARE
ANY CHANGE
PERMITTED
DOES NOT
APPLY
CC
CC
t
R
t
R
MIN.
t
V
V
RC
1.0
IH
--
IL
0
(2)
BH616UV8010
TYP.
0.5
2.5
--
--
--
(1)
OUTPUTS
MUST BE
STEADY
WILL BE CHANGE
FROM “H” TO “L”
WILL BE CHANGE
FROM “L” TO “H”
CHANGE :
STATE UNKNOW
CENTER LINE IS
HIGH INPEDANCE
“OFF” STATE
MAX.
3.0
12
--
--
--
Revision 1.0
Jul.
UNITS
uA
ns
ns
V
2005

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