BH616UV1611BI55 BSI [Brilliance Semiconductor], BH616UV1611BI55 Datasheet

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BH616UV1611BI55

Manufacturer Part Number
BH616UV1611BI55
Description
Ultra Low Power/High Speed CMOS SRAM 1M X 16 bit / 2M x 8-bit
Manufacturer
BSI [Brilliance Semiconductor]
Datasheet
n FEATURES
Ÿ Wide V
Ÿ Ultra low power consumption :
Ÿ High speed access time :
Ÿ Automatic power down when chip is deselected
Ÿ Easy expansion with CE1, CE2 and OE options
Ÿ I/O Configuration x8/x16 selectable by LB and UB pin.
Ÿ Three state outputs and TTL compatible
Ÿ Fully static operation, no clock, no refresh
Ÿ Data retention supply voltage as low as 1.0V
n POWER CONSUMPTION
n PIN CONFIGURATIONS
R0201-BH616UV1611
CE2
A15
A14
A13
A12
A10
A19
A18
A17
A11
WE
Brilliance Semiconductor, Inc.
Detailed product characteristic test report is available upon request and being accepted.
NC
NC
UB
V
V
-55
-70
BH616UV1611DI
BH616UV1611BI
BH616UV1611TI
A9
A8
LB
A7
A6
A5
A4
A3
A2
A1
CC
CC
PRODUCT
= 3.6V
= 1.2V
FAMILY
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
CC
low operation voltage : 1.65V ~ 3.6V
G
A
B
C
D
E
F
H
DQ14
DQ15
DQ8
DQ9
VSS
VCC
A18
Operation current : 10mA (Max.) at 55ns
Standby current : 5.0uA (Typ.) at 3.0V/25
Data retention current : 1.5uA(Typ.) at 25
55ns (Max.) at V
70ns (Max.) at V
LB
1
TEMPERATURE
DQ10
DQ11
DQ12
DQ13
A19
OE
UB
A8
BH616UV1611TI
-40
2
48-ball BGA top view
OPERATING
Industrial
O
C to +85
A17
A14
A12
NC
A0
A3
A5
A9
3
Pb-Free and Green package materials are compliant to RoHS
Ultra Low Power/High Speed CMOS SRAM
1M X 16 bit / 2M x 8-bit
A16
A15
A13
A10
A1
A4
A6
A7
4
CC
CC
=1.65~3.6V
=1.65~3.6V
O
C
2mA (Max.) at 1MHz
CE1
DQ1
DQ3
DQ4
DQ5
A11
WE
A2
5
V
VCC
CE2
DQ0
DQ2
VSS
DQ6
DQ7
CC
30uA
NC
6
=3.6V
STANDBY
(I
CCSB1
reserves the right to change products and specifications without notice.
, Max)
V
CC
25uA
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
=1.8V
O
A16
BYTE
VSS
DQ15/A20
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
VCC
DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
OE
VSS
CE1
A0
C
O
C
1MHz
2mA
1
POWER DISSIPATION
n DESCRIPTION
The BH616UV1611 is a high performance, ultra low power CMOS
Static Random Access Memory organized as 1,048,576 by 16 bits
and operates in a wide range of 1.65V to 3.6V supply voltage.
Advanced CMOS technology and circuit techniques provide both
high speed and low power features with typical operating current of
1.5mA at 1MHz at 3.0V/25
1.65V/85
Easy memory expansion is provided by an active LOW chip enable
(CE1), an active HIGH chip enable (CE2) and active LOW output
enable (OE) and three-state output drivers.
The BH616UV1611 has an automatic power down feature, reducing
the power consumption significantly when chip is deselected.
The BH616UV1611 is available in DICE form, JEDEC standard
48-pin TSOP-I and 48-ball BGA package.
n BLOCK DIAGRAM
CE2, CE1
V
10MHz
CC
6mA
DQ15
DQ0
A15
A14
A13
A12
A10
A19
A18
=3.6V
A11
WE
V
OE
UB
V
A9
A8
LB
.
.
.
.
.
.
CC
SS
O
C.
.
.
.
.
.
.
10mA
Address
Buffer
f
Input
Max.
Operating
Control
(I
16
16
CC
, Max)
10
1.5mA
1MHz
O
C and maximum access time of 55ns at
Output
Buffer
Buffer
Data
Input
Data
Decoder
Row
V
10MHz
BH616UV1611
CC
5mA
16
=1.8V
16
1024
A16
8mA
f
Max.
A0
A17
Address Input Buffer
Revision
Otc.
Column Decoder
A7
Memory Array
1024 x 16384
Write Driver
Column I/O
Sense Amp
DICE
BGA-48-0810
TSOP I-48
PKG TYPE
A6
A5
16384
1024
10
A4 A3 A2
2006
1.3
A1

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BH616UV1611BI55 Summary of contents

Page 1

Ultra Low Power/High Speed CMOS SRAM bit / 2M x 8-bit Pb-Free and Green package materials are compliant to RoHS n FEATURES Ÿ Wide V low operation voltage : 1.65V ~ 3.6V CC Ÿ Ultra low power ...

Page 2

PIN DESCRIPTIONS Name A0 to A19 Address Input (word mode A20 Address Input (byte mode) (TSOP only) CE1 Chip Enable 1 Input CE2 Chip Enable 2 Input WE Write Enable Input OE Output Enable Input LB and ...

Page 3

TRUTH TABLE Byte Mode (TSOP only) MODE CE2 CE1 WE Chip H X De-selected X L (Power Down) Output L H Disabled Read L H (byte mode) Write L H (byte mode) Word Mode MODE CE1 CE2 WE H ...

Page 4

ABSOLUTE MAXIMUM RATINGS SYMBOL PARAMETER Terminal Voltage with V TERM Respect to GND Temperature Under T BIAS Bias T Storage Temperature STG P Power Dissipation Output Current OUT 1. Stresses greater than those listed under ABSOLUTE ...

Page 5

DATA RETENTION CHARACTERISTICS (T SYMBOL PARAMETER V V for Data Retention Data Retention Current CCDR Chip Deselect to Data t CDR Retention Time t Operation Recovery Time R 1. Typical characteristics are at T =25 A ...

Page 6

BYTE FUNCTION PARAMETER NAME BYTE Setup Time t BS BYTE Recovery Time t BR CE2 CE1 BYTE n AC ELECTRICAL CHARACTERISTICS (T READ CYCLE JEDEC PARANETER PARAMETER NAME NAME t t Read Cycle Time AVAX Address ...

Page 7

SWITCHING WAVEFORMS (READ CYCLE) (1,2,4) READ CYCLE 1 ADDRESS D OUT (1,3,4) READ CYCLE 2 CE1 CE2 D OUT (1, 4) READ CYCLE 3 ADDRESS OE CE1 CE2 LB OUT NOTES high in read ...

Page 8

AC ELECTRICAL CHARACTERISTICS (T WRITE CYCLE JEDEC PARANETER PARAMETER NAME NAME t t Write Cycle Time AVAX Address Set up Time AVWL Address Valid to End of Write AVWH Chip ...

Page 9

WRITE CYCLE 2 ADDRESS CE1 CE2 LB OUT D IN NOTES must be high during address transitions. 2. The internal write time of the memory is defined by the overlap of CE1 and CE2 ...

Page 10

ORDERING INFORMATION BH616UV1611 Note: Brilliance Semiconductor Inc. (BSI) assumes no responsibility for the application or use of any product or circuit described herein. BSI does not authorize its products for use as critical components in any application in which ...

Page 11

PACKAGE DIMENSIONS TSOP I-48 Pin (12mm x 20mm) R0201-BH616UV1611 BH616UV1611 11 Revision 1.3 Otc. 2006 ...

Page 12

Revision History Revision No. History 1.0 Initial Production Version 1.1 Change I-grade operation temperature range - from –25 O 1.2 Add Part Number for 70ns 1.3 Add DICE form and 48 TSOP-I package type Change BGA package dimension for ...

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