BH616UV8010AI BSI [Brilliance Semiconductor], BH616UV8010AI Datasheet

BH616UV8010AI

Manufacturer Part Number

BH616UV8010AI

Description

Ultra Low Power/High Speed CMOS SRAM 512K X 16 bit

Manufacturer

BSI [Brilliance Semiconductor]

Datasheet

1.BH616UV8010AI.pdf (11 pages)

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R0201-BH616UV8010

n FEATURES

Ÿ Wide V

Ÿ Ultra low power consumption :

Ÿ High speed access time :

Ÿ Automatic power down when chip is deselected

Ÿ Easy expansion with CE1, CE2 and OE options

Ÿ I/O Configuration x8/x16 selectable by LB and UB pin.

Ÿ Three state outputs and TTL compatible

Ÿ Fully static operation, no clock, no refreash

Ÿ Data retention supply voltage as low as 1.0V

n PRODUCT FAMILY

n PIN CONFIGURATIONS

Brilliance Semiconductor, Inc.

Detailed product characteristic test report is available upon request and being accepted.

-70

CE2

A15

A14

A13

A12

A10

A18

A17

A11

BH616UV8010DI

BH616UV8010TI

BH616UV8010AI

= 3.0V

= 2.0V

PRODUCT

low operation voltage : 1.65V ~ 3.6V

FAMILY

BSI

Operation current : 5.0mA at 70ns at 25

Standby current : 2.5uA at 25

Data retention current : 2.5uA at 25

70ns at 1.8V at 85

DQ14

DQ15

DQ8

DQ9

VSS

VCC

A18

BH616UV8010TC

BH616UV8010TI

DQ10

DQ11

DQ12

DQ13

48-ball BGA top view

TEMPERATURE

-25

OPERATING

VSS

A17

A14

A12

Ultra Low Power/High Speed CMOS SRAM

512K X 16 bit

C to +70

C to +85

A16

A15

A13

A10

1.5mA at 1MHz at 25

CE1

DQ1

DQ3

DQ4

DQ5

A11

DQ0

DQ2

VCC

VSS

DQ6

DQ7

CE2

1.65V ~ 3.6V

reserves the right to modify document contents without notice.

RANGE

A16

VSS

DQ15

DQ7

DQ14

DQ6

DQ13

DQ5

DQ12

DQ4

VCC

DQ11

DQ3

DQ10

DQ2

DQ9

DQ1

DQ8

DQ0

VSS

CE1

SPEED

=1.8~3.6V

(ns)

n DESCRIPTION

The BH616UV8010 is a high performance, ultra low power CMOS Static

Random Access Memory organized as 524,288 by 16 bits and operates

in a wide range of 1.65V to 3.6V supply voltage.

Advanced CMOS technology and circuit techniques provide both high

speed and low power features with typical operating current of 1.5mA at

1MHz at 3.6V/25

Easy memory expansion is provided by an active LOW chip enable

(CE1), an active HIGH chip enable (CE2) and active LOW output

enable (OE) and three-state output drivers.

The BH616UV8010 has an automatic power down feature, reducing the

power consumption significantly when chip is deselected.

The BH616UV8010 is available in DICE form, JEDEC standard 48-pin

TSOP-I and 48-ball BGA package.

n BLOCK DIAGRAM

DQ15

DQ0

CE2

CE1

A12

A11

A10

Address

13uA

15uA

Buffer

Input

=3.6V V

STANDBY

Control

POWER CONSUMPTION

C and maximum access time of 70ns at 1.8V/85

CCSB1

, Max)

10uA

12uA

=1.8V V

Output

Buffer

Input

Data

Decoder

Row

10mA

=3.6V V

Operating

BH616UV8010

1024

, Max)

A18

7mA

=1.8V

A17

Address Input Buffer

A15

Column Decoder

Memory Array

1024 x 8192

Column I/O

Write Driver

Sense Amp

A14

DICE

TSOP1-48

BGA-48-0608

A13

PKG TYPE

512

Revision 1.0

8192

Jul.

A16 A2 A1

2005

Related parts for BH616UV8010AI

BH616UV8010AI Summary of contents

Page 1

... Three state outputs and TTL compatible Ÿ Fully static operation, no clock, no refreash Ÿ Data retention supply voltage as low as 1.0V n PRODUCT FAMILY PRODUCT OPERATING FAMILY TEMPERATURE BH616UV8010DI +70 BH616UV8010TI O - +85 BH616UV8010AI n PIN CONFIGURATIONS A15 1 A14 2 A13 3 A12 4 A11 5 A10 ...

Page 2

BSI n PIN DESCRIPTIONS Name A0-A18 Address Input CE1 Chip Enable 1 Input CE2 Chip Enable 2 Input WE Write Enable Input OE Output Enable Input LB and UB Data Byte Control Input DQ0-DQ15 Data Input/Output Ports ...

Page 3

BSI n ABSOLUTE MAXIMUM RATINGS SYMBOL PARAMETER Terminal Voltage with V TERM Respect to GND Temperature Under T BIAS Bias T Storage Temperature STG P Power Dissipation Output Current OUT 1. Stresses greater than those listed under ...

Page 4

BSI n DATA RETENTION CHARACTERISTICS (T SYMBOL PARAMETER V V for Data Retention DR CC (3) I Data Retention Current CCDR Chip Deselect to Data t CDR Retention Time t Operation Recovery Time = ...

Page 5

BSI n AC ELECTRICAL CHARACTERISTICS (T READ CYCLE JEDEC PARANETER PARAMETER NAME NAME t t AVAX AVQX E1LQV ACS1 t t E2LQV ACS2 t t BLQV GLQV E1LQX ...

Page 6

BSI (1,3,4) READ CYCLE 2 CE1 CE2 D OUT (1, 4) READ CYCLE 3 ADDRESS OE CE1 CE2 LB OUT NOTES high in read Cycle. 2. Device is continuously selected when CE1 = V 3. ...

Page 7

BSI n AC ELECTRICAL CHARACTERISTICS (T WRITE CYCLE JEDEC PARANETER PARAMETER NAME NAME t t AVAX AVWL AVWH ELWH BLWH WLWH WHAX ...

Page 8

BSI (1,6) WRITE CYCLE 2 ADDRESS CE1 CE2 LB OUT D IN NOTES must be high during address transitions. 2. The internal write time of the memory is defined by the overlap of CE1 and ...

Page 9

BSI n ORDERING INFORMATION BH616UV8010 X Note: Brilliance Semiconductor Inc. (BSI) assumes no responsibility for the application or use of any product or circuit described herein. BSI does not authorize its products for use as critical components in any application ...

Page 10

BSI PACKAGE DIMENSIONS TSOP1-48 Pin (12mm x 20mm) R0201-BH616UV8010 BH616UV8010 10 Revision 1.0 Jul. 2005 ...

Page 11

BSI n Revision History Revision No. History 1.0 Initial Production Version R0201-BH616UV8010 BH616UV8010 Draft Date July 15,2005 11 Remark Initial Revision 1.0 Jul. 2005 ...

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