FPF2116_08 FAIRCHILD [Fairchild Semiconductor], FPF2116_08 Datasheet - Page 10

• Manufacturer Part Number: FPF2116_08
• Manufacturer: FAIRCHILD [Fairchild Semiconductor]

FPF2116 Rev. D
Application Information
Typical Application
Input Capacitor
To limit the voltage drop on the input supply caused by transient
in-rush currents when the switch turns-on into a discharged load
capacitor or a short-circuit, a capacitor needs to be placed
between V
placed close to the V
further reduce the voltage drop experienced as the switch is
turned on into a large capacitive load.
Output Capacitor
A 0.1uF capacitor C
GND. This capacitor will prevent parasitic board inductances
from forcing V
total output capacitance needs to be kept below a maximum
value, C
over-current condition and turning off the switch. The maximum
output capacitance can be determined from the following
formula,
Power Dissipation
During normal operation as a switch, the power dissipation is
small and has little effect on the operating temperature of the
part. The parts with the higher current limits will dissipate the
most power and that will only be,
When in current limit the maximum power dissipation will occur
when the output is shorted to ground. The power dissipation will
scale by the Auto-Restart Time, t
Blanking Time, t
is typically,
P max
Battery
5.5V
P
(
C
=
OUT
(
I
)
OUT
LIM
(
IN
=
=
max
and GND. A 4.7µF ceramic capacitor, C
(max), to prevent the part from registering an
)
------------------------------------------- -
t
---------------------- -
60
2
RETRY
OUT
×
BLANK
)
60
+
R
=
t
960
below GND when the switch turns-off. The
BLANK
DS
OUT
IN
I
----------------------------------------------------------------- -
, so that the maximum power dissipated
+
LIM
pin. A higher value of C
=
×
, should be placed between V
t
BLANK
5.5 0.4
(
C1 = 4.7µF
(
min
0.4
×
)
OFF ON
) t
2
RSTRT
×
×
V
×
V
IN
BLANK
0.125
IN
=
, and the Over
(
130mW
max
5.5V MAX
(
=
min
) I
IN
20mW
×
can be used to
)
LIM
IN
(
, must be
max
OUT
V
ON
Current
IN
)
and
(1)
(2)
(3)
FPF2116
10
GND
Board Layout
For best performance, all traces should be as short as possible.
To be most effective, the input and output capacitors should be
placed close to the device to minimize the effects that parasitic
trace inductances may have on normal and short-circuit
operation. Using wide traces for V
minimize parasitic electrical effects along with minimizing the
case to ambient thermal impedance.
FLAGB
V
OUT
R1 = 100KΩ
C2 = 0.1µF
IN
, V
OUT
and GND will help
www.fairchildsemi.com
R2 = 110Ω