FDMF6704A_09 FAIRCHILD [Fairchild Semiconductor], FDMF6704A_09 Datasheet
FDMF6704A_09
Related parts for FDMF6704A_09
FDMF6704A_09 Summary of contents
Page 1
FDMF6704A - XS The Xtra Small, High Performance, High Frequency DrMOS Module Benefits Ultra compact size - MLP space saving compared to conventional MLP DrMOS packages. Fully optimized ...
Page 2
Functional Block Diagram DISB# PWM SMOD# Pin Configuration PWM 40 CGND V DISB CGND VSWH 35 VSWH 34 VSWH VSWH 33 43 VSWH 32 VSWH 31 Bottom View FDMF6704A Rev. F VCIN VDRV ...
Page 3
Pin Description Pin Name 1 SMOD# 2 VCIN 3 VDRV 4 BOOT 5, 37, 41 CGND PHASE 9-14, 42 VIN 15, 29-35, 43 VSWH, PHASE 16-28 PGND DISB# 40 PWM Absolute ...
Page 4
Electrical Characteristics °C unless otherwise noted Parameter Operating Quiescent Current VCIN UVLO UVLO Threshold UVLO COMP Hysteresis PWM, DISB# and SMOD# Input High Level Input Voltage Low Level Input Voltage Input ...
Page 5
Description of Operation Circuit Description The FDMF6704A is a driver plus FET module optimized for synchronous buck converter topology. A single PWM input signal is all that is required to properly drive the high-side and the low-side MOSFETs. Each part ...
Page 6
Timing Diagrams PWM VSWH VSWH Switch Node Ringing Suppression Fairchild's DrMOS products have proprietary feature* that minimizes the peak overshoot and ringing voltage on the switch node (VSWH) output, without the need of external snubbers. The following ...
Page 7
Typical Characteristics V = 12V 5V 25°C unless otherwise noted. IN CIN 1.3 V OUT MHz SW L ...
Page 8
Typical Characteristics V = 12V 5V 25°C unless otherwise noted. IN CIN A 1.045 1.040 1.035 1.030 1.025 1.020 1.015 1.010 1.3 V 1.005 OUT ...
Page 9
Typical Characteristics V = 12V 5V 25°C unless otherwise noted. IN CIN A 2.2 2 1.8 1.6 1.4 1.2 1.0 4.5 4.8 5.0 5.3 Driver Supply Voltage, V Figure 19. SMOD# Threshold Voltage vs. ...
Page 10
Application Information Supply Capacitor Selection For the supply input (VCIN) of the FDMF6704A, a local ceramic bypass capacitor is recommended to reduce the noise and to supply the peak current. Use at least X7R or X5R capacitor. ...
Page 11
Power Loss and Efficiency Measurement and Calculation Refer to Figure 24 for power loss testing method. Power loss calculation are as follows ...
Page 12
TOP VIEW FDMF6704A Rev. F Figure 25. Typical PCB Layout Example 12 BOTTOM VIEW www.fairchildsemi.com ...
Page 13
Dimensional Outline and Pad layout FDMF6704A Rev www.fairchildsemi.com ...
Page 14
TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidianries, and is not intended exhaustive list of all such trademarks. Auto-SPM™ F-PFS™ Build it Now™ FRFET CorePLUS™ Global ...