MT28F320J3FS-12 MICRON [Micron Technology], MT28F320J3FS-12 Datasheet - Page 47

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MT28F320J3FS-12

Manufacturer Part Number
MT28F320J3FS-12
Description
Q-FLASHTM MEMORY
Manufacturer
MICRON [Micron Technology]
Datasheet
TIMING PARAMETERS
NOTE: 1. CEx LOW is defined as the first edge of CE0, CE1, or CE2 that enables the device. CEx HIGH is defined at the first edge
128Mb, 64Mb, 32Mb Q-Flash Memory
MT28F640J3_7.p65 – Rev. 6, Pub. 8/02
SYMBOL
t
t
t
t
t
t
t
RS
CS
WP
DS
AS
CH
DH
2. V
3. Write block erase, write buffer, or program setup.
4. Write block erase or write buffer confirm, or valid address and data.
5. Automated erase delay.
6. Read status register or query data.
7. WRITE READ ARRAY command.
of CE0, CE1, or CE2 that disables the device (see Table 2). STS is shown in its default mode (RY/BY#).
CC
DQ0–DQ15
CEx (WE#)
Addresses
WE# (CEx)
power-up and standby.
Disabled
Disabled
Enabled
Enabled
V
OE#
RP#
STS
PEN
V
V
PENLK
PENH
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
OH
OL
IH
IH
IH
IH
IH
IH
IL
IL
IL
IL
IL
IL
IL
Note 2
t
RS
t
DS
MIN
t
-11/-12/-15
CS
70
50
55
1
0
0
0
Note 3
A
IN
MAX
D
IN
t
AS
WRITE OPERATIONS
t
t
WP
WPH
t
CH
UNITS
t
DH
t
Note 4
µs
ns
ns
ns
ns
ns
ns
VPS
A
IN
D
IN
47
t
WR
t
WB
Note 5
t
AH
SYMBOL
t
t
t
t
t
t
t
AH
WPH
VPS
WR
STS
VPH
WB
t
STS
BUSY SRD
VALID
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Note 6
READY SRD
t
VPH
VALID
128Mb, 64Mb, 32Mb
Q-FLASH MEMORY
Note 7
D
IN
UNDEFINED
MIN
-11/-12/-15
30
35
0
0
0
©2002, Micron Technology, Inc.
MAX
200
200
UNITS
ns
ns
ns
ns
ns
ns
ns

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