HYB18L512320BF-7.5 QIMONDA [Qimonda AG], HYB18L512320BF-7.5 Datasheet - Page 12

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HYB18L512320BF-7.5

Manufacturer Part Number
HYB18L512320BF-7.5
Description
DRAMs for Mobile Applications 512-Mbit SDR Mobile-RAM
Manufacturer
QIMONDA [Qimonda AG]
Datasheet

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9) Concurrent Auto Precharge: bank n will start precharging when its burst has been interrupted by a READ or WRITE command to bank m.
1) CKEn is the logic state of CKE at clock edge n; CKEn-1 was the state of CKE at the previous clock edge.
2) Current state is the state immediately prior to clock edge n.
3) COMMAND n is the command registered at clock edge n; ACTION n is a result of COMMAND n.
4) All states and sequences not shown are illegal or reserved.
5) DESELECT or NOP commands should be issued on any clock edges occurring during
6) Exit from DEEP POWER DOWN requires the same command sequence as for power-up initialization.
Rev.1.22, 2007-08
03292006-D7GM-ZBSS
CKEn-1
L
L
H
H
CKEn
L
H
L
H
Current State
Power Down
Self Refresh
Clock Suspend
Deep Power Down
Power Down
Self Refresh
Clock Suspend
Deep Power Down
All Banks Idle
Bank(s) Active
All Banks Idle
Read / Write burst
See
Table 7
and
Table 8
Command
X
X
X
X
DESELECT or NOP
DESELECT or NOP
X
X
DESELECT or NOP
DESELECT or NOP
AUTO REFRESH
(valid)
12
Action
Maintain Power Down
Maintain Self Refresh
Maintain Clock Suspend
Maintain Deep Power Down
Exit Power Down
Exit Self Refresh
Exit Clock Suspend
Exit Deep Power Down
Enter Precharge Power Down
Enter Active Power Down
Enter Self Refresh
Enter Clock Suspend
t
RC
period.
HY[B/E]18L512320BF-7.5
512-Mbit Mobile-RAM
Truth Table - CKE
Internet Data Sheet
TABLE 9
Notes
1)2)3)4)
1)2)3)4)
1)2)3)4)
1)2)3)4)
1)2)3)4)
1)2)3)4)5)
1)2)3)4)
1)2)3)4)6)
1)2)3)4)
1)2)3)4)
1)2)3)4)
1)2)3)4)
1)2)3)4)

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