HYB18L512320BF-7.5 QIMONDA [Qimonda AG], HYB18L512320BF-7.5 Datasheet
HYB18L512320BF-7.5
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HYB18L512320BF-7.5 Summary of contents
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HY[B/E]18L512320BF-7.5 Internet Data Sheet Revision History: Rev.1.22, 2007-08 all Editorial change. Adopted Internet Edition Previous Revision: Rev1.21, 2006-12 all Qimonda update Previous Revision: Rev.1.2 2005-04 We Listen to Your Comments Any information within this document that you feel is wrong, ...
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Overview 1.1 Features • 4 banks × 4 Mbit × 32 organization (dual-die) • Fully synchronous to positive clock edge • Four internal banks for concurrent operation • Programmable CAS latency • Programmable burst length ...
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... Item Banks Rows Columns 1) Type Package Standard Temperature Range HYB18L512320BF-7.5 PG-TFBGA-90-3 Extended Temperature Range HYE18L512320BF-7.5 PG-TFBGA-90-3 1) HY[B/E]: Designator for memory products (HYB: Standard temp range, HYE: extended temp. range) 18L: 1.8 V Mobile-RAM 512: 512 MBit density 32: 32 bit interface width B: die revision F: green product -7 ...
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Pin Configuration Rev.1.22, 2007-08 03292006-D7GM-ZBSS HY[B/E]18L512320BF-7.5 Standard Ballout 256-Mbit Mobile-RAM (Top View x32) 5 Internet Data Sheet 512-Mbit Mobile-RAM FIGURE 1 ...
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... Description The HY[B/E]18L512320BF is a high-speed CMOS, dynamic random-access memory containing 536,870,912 bits internally configured as a quad-bank DRAM. The HY[B/E]18L512320BF achieves high speed data transfer rates by employing a chip architecture that prefetches multiple bits and then synchronizes the output data to the system clock. Read and write accesses are burst-oriented; accesses start at a selected location and continue for a programmed number of locations ( full page programmed sequence ...
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... CS Input Chip Select: All commands are masked when CS is registered high. CS provides for external bank selection on systems with multiple memory banks considered part of the command code. RAS, CAS, Input Command Inputs: RAS, CAS and WE (along with CS) define the command being entered. ...
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... Functional Description The 512-Mbit Mobile-RAM is a high-speed CMOS, dynamic random-access memory containing 536,870,912 bits internally configured as a quad-bank DRAM. READ and WRITE accesses to the Mobile-RAM are burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of an ACTIVE command, followed by a READ or WRITE command ...
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Field Bits Type Description Burst Type 0 Sequential 1 Interleaved BL [2:0] w Burst Length 000 1 001 2 010 4 011 8 111 full page (Sequential burst type only) Note: All other bit combinations are RESERVED. ...
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Function Truth Tables Current State CS RAS CAS Any Idle Row Active ...
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May or may not be bank-specific; if multiple banks are to be precharged, each must valid state for precharging. 11) Not bank-specific; BURST TERMINATE affects the most recent READ or WRITE burst, regardless of bank. Current ...
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Concurrent Auto Precharge: bank n will start precharging when its burst has been interrupted by a READ or WRITE command to bank m. CKEn-1 CKEn Current State L L Power Down Self Refresh Clock Suspend Deep Power Down L ...
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Electrical Characteristics 3.1 Operating Conditions Parameter Power Supply Voltage Power Supply Voltage for Output Buffer Input Voltage Output Voltage Operation Case Temperature Storage Temperature Power Dissipation Short Circuit Output Current Attention: Stresses above those listed here may cause permanent ...
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Parameter Power Supply Voltage Power Supply Voltage for DQ Output Buffer Input high voltage Input low voltage Output high voltage Output low voltage Input leakage current Output leakage current 1) 0 ⎦C ≤ ≤ 70 °C (comm.); -25 °C ≤ ...
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Parameter ACTIVE bank A to ACTIVE bank B delay ACTIVE to PRECHARGE command period WRITE recovery time PRECHARGE command period Refresh period (8192 rows) Self refresh exit time 1) 0 °C ≤ T ≤ 70 °C (comm.); -25 °C ≤ ...
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Operating Currents Parameter & Test Conditions Operating current: one bank: active / read / precharge Precharge power-down standby current: all banks idle, CS ≥ CKE ≤ V IHmin ILmax inputs changing once every two ...
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Parameter & Test Conditions 85 °C Self Refresh Current: Self refresh mode, full array 70 °C activation(PASR = 000) 45 °C 25 °C 85 °C Self Refresh Current: Self refresh mode, half array 70 °C activation(PASR = 001) 45 °C ...
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Pullup and Pulldown Characteristics Voltag Half Drive Strength e (V) Pull-Down Current (mA) Pull-Up Current (mA) Nominal Nominal Nominal Low High Low 0.00 0.0 0.0 -19.7 0.40 15.1 20.5 -18.8 0.65 20.3 28.5 -18.2 0.85 22.0 32.0 -17.6 1.00 ...
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Package Outlines Rev.1.22, 2007-08 03292006-D7GM-ZBSS HY[B/E]18L512320BF-7.5 PG-TFBGA-90-3 (Plastic Thin Fine Ball Grid Array Package) 19 Internet Data Sheet 512-Mbit Mobile-RAM FIGURE 3 ...
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List of Figures Figure 1 Standard Ballout 256-Mbit Mobile-RAM (Top View x32 ...
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... List of Tables Table 1 Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Table 2 Memory Addressing Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Table 3 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Table 4 Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 5 Mode Register Definition (BA[1: Table 6 Extended Mode Register Definition (BA[1: Table 7 Current State Bank n - Command to Bank Table 8 Current State Bank n - Command to Bank m (different bank Table 9 Truth Table - CKE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table 10 Absolute Maximum Ratings ...
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Table of Contents 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Edition 2007-08 Published by Qimonda AG Gustav-Heinemann-Ring 212 D-81739 München, Germany © Qimonda AG 2007. All Rights Reserved. Legal Disclaimer The information given in this Internet Data Sheet shall in no event be regarded as a guarantee of conditions or ...