HYB25D256160CC-5 QIMONDA [Qimonda AG], HYB25D256160CC-5 Datasheet - Page 21

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HYB25D256160CC-5

Manufacturer Part Number
HYB25D256160CC-5
Description
256-Mbit Double-Data-Rate SDRAM
Manufacturer
QIMONDA [Qimonda AG]
Datasheet

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9) Concurrent Auto Precharge: This device supports “Concurrent Auto Precharge”. When a read with auto precharge or a write with auto
10) A Write command may be applied after the completion of data output.
Rev. 2.3, 2007-03
03062006-8CCM-VPUW
From Command
WRITE w/AP
Read w/AP
precharge is enabled any command may follow to the other banks as long as that command does not interrupt the read or write data
transfer and all other limitations apply (e.g. contention between READ data and WRITE data must be avoided). The minimum delay from
a read or write command with auto precharge enable, to a command to a different banks is summarized in
To Command (different bank)
Read or Read w/AP
Write to Write w/AP
Precharge or Activate
Read or Read w/AP
Write or Write w/AP
Precharge or Activate
21
Minimum Delay with Concurrent Auto
Precharge Support
1 + (BL/2) +
BL/2
1
BL/2
CL (rounded up) + BL/2
1
Truth Table 5: Concurrent Auto Precharge
HY[B/I]25D256[16/40/80]0C[E/C/F/T](L)
t
256 Mbit Double-Data-Rate SDRAM
WTR
Table
Internet Data Sheet
15.
TABLE 15
Unit
t
t
t
t
t
t
CK
CK
CK
CK
CK
CK

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